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PCI: imx6: Use enum instead of bool for variant indicator

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Use enumerated type instead of a boolean flag to specify the variant of
the PCIe IP block (6Q, 6SX, etc).  This patch has zero functional impact,
however it makes the code easier to extend for the case of more than 2
possible variants of an IP block (of which there are).

[bhelgaas: rewrap comment, remove extra blank line]
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
This commit is contained in:
Andrey Smirnov
2016-05-02 14:08:21 -05:00
committed by Bjorn Helgaas
parent a5fcec480f
commit e6f1fef04c
1 changed files with 70 additions and 59 deletions
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69
drivers/pci/host/pci-imx6.c
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@@ -19,6 +19,7 @@
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/of_gpio.h> #include <linux/of_gpio.h>
#include <linux/of_device.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/regmap.h> #include <linux/regmap.h>
@@ -31,6 +32,11 @@
#define to_imx6_pcie(x) container_of(x, struct imx6_pcie, pp) #define to_imx6_pcie(x) container_of(x, struct imx6_pcie, pp)
enum imx6_pcie_variants {
IMX6Q,
IMX6SX
};
struct imx6_pcie { struct imx6_pcie {
int reset_gpio; int reset_gpio;
bool gpio_active_high; bool gpio_active_high;
@@ -40,7 +46,7 @@ struct imx6_pcie {
struct clk *pcie; struct clk *pcie;
struct pcie_port pp; struct pcie_port pp;
struct regmap *iomuxc_gpr; struct regmap *iomuxc_gpr;
bool is_imx6sx; enum imx6_pcie_variants variant;
void __iomem *mem_base; void __iomem *mem_base;
u32 tx_deemph_gen1; u32 tx_deemph_gen1;
u32 tx_deemph_gen2_3p5db; u32 tx_deemph_gen2_3p5db;
@@ -240,7 +246,8 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp); struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
u32 val, gpr1, gpr12; u32 val, gpr1, gpr12;
if (imx6_pcie->is_imx6sx) { switch (imx6_pcie->variant) {
case IMX6SX:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6SX_GPR12_PCIE_TEST_POWERDOWN, IMX6SX_GPR12_PCIE_TEST_POWERDOWN,
IMX6SX_GPR12_PCIE_TEST_POWERDOWN); IMX6SX_GPR12_PCIE_TEST_POWERDOWN);
@@ -248,19 +255,20 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5,
IMX6SX_GPR5_PCIE_BTNRST_RESET, IMX6SX_GPR5_PCIE_BTNRST_RESET,
IMX6SX_GPR5_PCIE_BTNRST_RESET); IMX6SX_GPR5_PCIE_BTNRST_RESET);
return 0; break;
} case IMX6Q:
/* /*
* If the bootloader already enabled the link we need some special * If the bootloader already enabled the link we need some
* handling to get the core back into a state where it is safe to * special handling to get the core back into a state where
* touch it for configuration. As there is no dedicated reset signal * it is safe to touch it for configuration. As there is
* wired up for MX6QDL, we need to manually force LTSSM into "detect" * no dedicated reset signal wired up for MX6QDL, we need
* state before completely disabling LTSSM, which is a prerequisite * to manually force LTSSM into "detect" state before
* for core configuration. * completely disabling LTSSM, which is a prerequisite for
* core configuration.
* *
* If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong * If both LTSSM_ENABLE and REF_SSP_ENABLE are active we
* indication that the bootloader activated the link. * have a strong indication that the bootloader activated
* the link.
*/ */
regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, &gpr1); regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, &gpr1);
regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, &gpr12); regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, &gpr12);
@@ -280,6 +288,8 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18); IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18);
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16); IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
break;
}
return 0; return 0;
} }
@@ -287,20 +297,20 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
{ {
struct pcie_port *pp = &imx6_pcie->pp; struct pcie_port *pp = &imx6_pcie->pp;
int ret; int ret = 0;
if (imx6_pcie->is_imx6sx) { switch (imx6_pcie->variant) {
case IMX6SX:
ret = clk_prepare_enable(imx6_pcie->pcie_inbound_axi); ret = clk_prepare_enable(imx6_pcie->pcie_inbound_axi);
if (ret) { if (ret) {
dev_err(pp->dev, "unable to enable pcie_axi clock\n"); dev_err(pp->dev, "unable to enable pcie_axi clock\n");
return ret; break;
} }
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6SX_GPR12_PCIE_TEST_POWERDOWN, 0); IMX6SX_GPR12_PCIE_TEST_POWERDOWN, 0);
return ret; break;
} case IMX6Q:
/* power up core phy and enable ref clock */ /* power up core phy and enable ref clock */
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18); IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
@@ -313,7 +323,10 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
udelay(10); udelay(10);
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16); IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
return 0; break;
}
return ret;
} }
static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
@@ -357,7 +370,7 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
!imx6_pcie->gpio_active_high); !imx6_pcie->gpio_active_high);
} }
if (imx6_pcie->is_imx6sx) if (imx6_pcie->variant == IMX6SX)
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5,
IMX6SX_GPR5_PCIE_BTNRST_RESET, 0); IMX6SX_GPR5_PCIE_BTNRST_RESET, 0);
@@ -371,18 +384,16 @@ err_pcie_bus:
clk_disable_unprepare(imx6_pcie->pcie_phy); clk_disable_unprepare(imx6_pcie->pcie_phy);
err_pcie_phy: err_pcie_phy:
return ret; return ret;
} }
static void imx6_pcie_init_phy(struct pcie_port *pp) static void imx6_pcie_init_phy(struct pcie_port *pp)
{ {
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp); struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
if (imx6_pcie->is_imx6sx) { if (imx6_pcie->variant == IMX6SX)
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6SX_GPR12_PCIE_RX_EQ_MASK, IMX6SX_GPR12_PCIE_RX_EQ_MASK,
IMX6SX_GPR12_PCIE_RX_EQ_2); IMX6SX_GPR12_PCIE_RX_EQ_2);
}
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6Q_GPR12_PCIE_CTL_2, 0 << 10); IMX6Q_GPR12_PCIE_CTL_2, 0 << 10);
@@ -593,8 +604,8 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
pp = &imx6_pcie->pp; pp = &imx6_pcie->pp;
pp->dev = &pdev->dev; pp->dev = &pdev->dev;
imx6_pcie->is_imx6sx = of_device_is_compatible(pp->dev->of_node, imx6_pcie->variant =
"fsl,imx6sx-pcie"); (enum imx6_pcie_variants)of_device_get_match_data(&pdev->dev);
/* Added for PCI abort handling */ /* Added for PCI abort handling */
hook_fault_code(16 + 6, imx6q_pcie_abort_handler, SIGBUS, 0, hook_fault_code(16 + 6, imx6q_pcie_abort_handler, SIGBUS, 0,
@@ -643,7 +654,7 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
return PTR_ERR(imx6_pcie->pcie); return PTR_ERR(imx6_pcie->pcie);
} }
if (imx6_pcie->is_imx6sx) { if (imx6_pcie->variant == IMX6SX) {
imx6_pcie->pcie_inbound_axi = devm_clk_get(&pdev->dev, imx6_pcie->pcie_inbound_axi = devm_clk_get(&pdev->dev,
"pcie_inbound_axi"); "pcie_inbound_axi");
if (IS_ERR(imx6_pcie->pcie_inbound_axi)) { if (IS_ERR(imx6_pcie->pcie_inbound_axi)) {
@@ -705,8 +716,8 @@ static void imx6_pcie_shutdown(struct platform_device *pdev)
} }
static const struct of_device_id imx6_pcie_of_match[] = { static const struct of_device_id imx6_pcie_of_match[] = {
{ .compatible = "fsl,imx6q-pcie", }, { .compatible = "fsl,imx6q-pcie", .data = (void *)IMX6Q, },
{ .compatible = "fsl,imx6sx-pcie", }, { .compatible = "fsl,imx6sx-pcie", .data = (void *)IMX6SX, },
{}, {},
}; };
MODULE_DEVICE_TABLE(of, imx6_pcie_of_match); MODULE_DEVICE_TABLE(of, imx6_pcie_of_match);