[Blackfin] arch: Functional power management support: Add support for cpu frequency scaling
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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Bryan Wu

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@@ -6,9 +6,10 @@
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* Created:
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* Description: This file contains the bfin-specific time handling details.
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* Most of the stuff is located in the machine specific files.
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* FIXME: (This file is subject for removal)
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*
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* Modified:
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* Copyright 2004-2006 Analog Devices Inc.
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* Copyright 2004-2008 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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@@ -35,6 +36,7 @@
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#include <linux/irq.h>
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#include <asm/blackfin.h>
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#include <asm/time.h>
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/* This is an NTP setting */
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#define TICK_SIZE (tick_nsec / 1000)
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@@ -47,21 +49,6 @@ static struct irqaction bfin_timer_irq = {
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.flags = IRQF_DISABLED
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};
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/*
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* The way that the Blackfin core timer works is:
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* - CCLK is divided by a programmable 8-bit pre-scaler (TSCALE)
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* - Every time TSCALE ticks, a 32bit is counted down (TCOUNT)
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*
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* If you take the fastest clock (1ns, or 1GHz to make the math work easier)
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* 10ms is 10,000,000 clock ticks, which fits easy into a 32-bit counter
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* (32 bit counter is 4,294,967,296ns or 4.2 seconds) so, we don't need
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* to use TSCALE, and program it to zero (which is pass CCLK through).
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* If you feel like using it, try to keep HZ * TIMESCALE to some
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* value that divides easy (like power of 2).
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*/
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#define TIME_SCALE 1
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static void
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time_sched_init(irq_handler_t timer_routine)
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{
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