x86/cpu: Switch to arch_cpu_finalize_init()
commit 7c7077a72674402654f3291354720cd73cdf649e upstream check_bugs() is a dumping ground for finalizing the CPU bringup. Only parts of it has to do with actual CPU bugs. Split it apart into arch_cpu_finalize_init() and cpu_select_mitigations(). Fixup the bogus 32bit comments while at it. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230613224545.019583869@linutronix.de Signed-off-by: Daniel Sneddon <daniel.sneddon@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:

committed by
Greg Kroah-Hartman

parent
6e606e6818
commit
e5eb18e164
@@ -59,6 +59,7 @@ config X86
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select ARCH_32BIT_OFF_T if X86_32
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select ARCH_32BIT_OFF_T if X86_32
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select ARCH_CLOCKSOURCE_INIT
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select ARCH_CLOCKSOURCE_INIT
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select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
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select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
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select ARCH_HAS_CPU_FINALIZE_INIT
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select ARCH_HAS_DEBUG_VIRTUAL
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select ARCH_HAS_DEBUG_VIRTUAL
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select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE
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select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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@@ -4,8 +4,6 @@
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#include <asm/processor.h>
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#include <asm/processor.h>
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extern void check_bugs(void);
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#if defined(CONFIG_CPU_SUP_INTEL) && defined(CONFIG_X86_32)
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#if defined(CONFIG_CPU_SUP_INTEL) && defined(CONFIG_X86_32)
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int ppro_with_ram_bug(void);
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int ppro_with_ram_bug(void);
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#else
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#else
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@@ -9,7 +9,6 @@
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* - Andrew D. Balsa (code cleanup).
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* - Andrew D. Balsa (code cleanup).
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*/
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*/
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/utsname.h>
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#include <linux/cpu.h>
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#include <linux/cpu.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/nospec.h>
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#include <linux/nospec.h>
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@@ -27,8 +26,6 @@
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#include <asm/msr.h>
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#include <asm/msr.h>
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#include <asm/vmx.h>
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#include <asm/vmx.h>
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#include <asm/paravirt.h>
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#include <asm/paravirt.h>
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#include <asm/alternative.h>
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#include <asm/set_memory.h>
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#include <asm/intel-family.h>
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#include <asm/intel-family.h>
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#include <asm/e820/api.h>
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#include <asm/e820/api.h>
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#include <asm/hypervisor.h>
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#include <asm/hypervisor.h>
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@@ -116,21 +113,8 @@ EXPORT_SYMBOL_GPL(mds_idle_clear);
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DEFINE_STATIC_KEY_FALSE(mmio_stale_data_clear);
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DEFINE_STATIC_KEY_FALSE(mmio_stale_data_clear);
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EXPORT_SYMBOL_GPL(mmio_stale_data_clear);
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EXPORT_SYMBOL_GPL(mmio_stale_data_clear);
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void __init check_bugs(void)
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void __init cpu_select_mitigations(void)
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{
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{
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identify_boot_cpu();
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/*
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* identify_boot_cpu() initialized SMT support information, let the
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* core code know.
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*/
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cpu_smt_check_topology();
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if (!IS_ENABLED(CONFIG_SMP)) {
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pr_info("CPU: ");
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print_cpu_info(&boot_cpu_data);
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}
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/*
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/*
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* Read the SPEC_CTRL MSR to account for reserved bits which may
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* Read the SPEC_CTRL MSR to account for reserved bits which may
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* have unknown values. AMD64_LS_CFG MSR is cached in the early AMD
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* have unknown values. AMD64_LS_CFG MSR is cached in the early AMD
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@@ -166,39 +150,6 @@ void __init check_bugs(void)
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l1tf_select_mitigation();
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l1tf_select_mitigation();
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md_clear_select_mitigation();
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md_clear_select_mitigation();
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srbds_select_mitigation();
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srbds_select_mitigation();
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arch_smt_update();
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#ifdef CONFIG_X86_32
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/*
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* Check whether we are able to run this kernel safely on SMP.
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*
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* - i386 is no longer supported.
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* - In order to run on anything without a TSC, we need to be
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* compiled for a i486.
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*/
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if (boot_cpu_data.x86 < 4)
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panic("Kernel requires i486+ for 'invlpg' and other features");
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init_utsname()->machine[1] =
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'0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
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alternative_instructions();
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fpu__init_check_bugs();
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#else /* CONFIG_X86_64 */
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alternative_instructions();
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/*
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* Make sure the first 2MB area is not mapped by huge pages
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* There are typically fixed size MTRRs in there and overlapping
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* MTRRs into large pages causes slow downs.
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*
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* Right now we don't do that with gbpages because there seems
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* very little benefit for that case.
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*/
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if (!direct_gbpages)
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set_memory_4k((unsigned long)__va(0), 1);
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#endif
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}
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}
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/*
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/*
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@@ -19,10 +19,13 @@
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#include <linux/kprobes.h>
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#include <linux/kprobes.h>
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#include <linux/kgdb.h>
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#include <linux/kgdb.h>
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#include <linux/smp.h>
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#include <linux/smp.h>
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#include <linux/cpu.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/syscore_ops.h>
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#include <linux/syscore_ops.h>
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#include <linux/pgtable.h>
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#include <linux/pgtable.h>
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#include <linux/utsname.h>
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#include <asm/alternative.h>
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#include <asm/cmdline.h>
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#include <asm/cmdline.h>
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#include <asm/stackprotector.h>
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#include <asm/stackprotector.h>
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#include <asm/perf_event.h>
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#include <asm/perf_event.h>
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@@ -58,6 +61,7 @@
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#include <asm/intel-family.h>
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#include <asm/intel-family.h>
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#include <asm/cpu_device_id.h>
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#include <asm/cpu_device_id.h>
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#include <asm/uv/uv.h>
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#include <asm/uv/uv.h>
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#include <asm/set_memory.h>
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#include "cpu.h"
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#include "cpu.h"
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@@ -2188,3 +2192,52 @@ void arch_smt_update(void)
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/* Check whether IPI broadcasting can be enabled */
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/* Check whether IPI broadcasting can be enabled */
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apic_smt_update();
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apic_smt_update();
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}
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}
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void __init arch_cpu_finalize_init(void)
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{
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identify_boot_cpu();
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/*
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* identify_boot_cpu() initialized SMT support information, let the
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* core code know.
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*/
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cpu_smt_check_topology();
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if (!IS_ENABLED(CONFIG_SMP)) {
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pr_info("CPU: ");
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print_cpu_info(&boot_cpu_data);
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}
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cpu_select_mitigations();
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arch_smt_update();
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if (IS_ENABLED(CONFIG_X86_32)) {
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/*
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* Check whether this is a real i386 which is not longer
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* supported and fixup the utsname.
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*/
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if (boot_cpu_data.x86 < 4)
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panic("Kernel requires i486+ for 'invlpg' and other features");
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init_utsname()->machine[1] =
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'0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
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}
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alternative_instructions();
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if (IS_ENABLED(CONFIG_X86_64)) {
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/*
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* Make sure the first 2MB area is not mapped by huge pages
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* There are typically fixed size MTRRs in there and overlapping
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* MTRRs into large pages causes slow downs.
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*
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* Right now we don't do that with gbpages because there seems
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* very little benefit for that case.
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*/
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if (!direct_gbpages)
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set_memory_4k((unsigned long)__va(0), 1);
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} else {
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fpu__init_check_bugs();
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}
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}
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@@ -78,6 +78,7 @@ extern void detect_ht(struct cpuinfo_x86 *c);
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extern void check_null_seg_clears_base(struct cpuinfo_x86 *c);
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extern void check_null_seg_clears_base(struct cpuinfo_x86 *c);
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unsigned int aperfmperf_get_khz(int cpu);
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unsigned int aperfmperf_get_khz(int cpu);
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void cpu_select_mitigations(void);
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extern void x86_spec_ctrl_setup_ap(void);
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extern void x86_spec_ctrl_setup_ap(void);
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extern void update_srbds_msr(void);
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extern void update_srbds_msr(void);
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