drm/amd/powerplay: add interface to get clock by type with latency for display (v2)
This patch adds get clock by type with latency, display will use it to get current clocks with latency. v2: fix the missed mutex lock before return. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -392,14 +392,21 @@ bool dm_pp_get_clock_levels_by_type_with_latency(
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void *pp_handle = adev->powerplay.pp_handle;
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struct pp_clock_levels_with_latency pp_clks = { 0 };
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const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
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int ret;
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if (!pp_funcs || !pp_funcs->get_clock_by_type_with_latency)
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return false;
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if (pp_funcs && pp_funcs->get_clock_by_type_with_latency) {
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ret = pp_funcs->get_clock_by_type_with_latency(pp_handle,
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dc_to_pp_clock_type(clk_type),
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&pp_clks);
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if (ret)
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return false;
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} else if (adev->smu.ppt_funcs && adev->smu.ppt_funcs->get_clock_by_type_with_latency) {
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if (smu_get_clock_by_type_with_latency(&adev->smu,
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dc_to_pp_clock_type(clk_type),
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&pp_clks))
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return false;
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}
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if (pp_funcs->get_clock_by_type_with_latency(pp_handle,
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dc_to_pp_clock_type(clk_type),
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&pp_clks))
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return false;
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pp_to_dc_clock_levels_with_latency(&pp_clks, clk_level_info, clk_type);
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