MIPS: BMIPS: Delete the irqchip driver from irq.c
BCM3384/BCM63xx can use the common drivers/irqchip/irq-bcm7120-l2.c for this purpose; BCM7xxx will use drivers/irqchip/irq-bcm7038-l1.c. We no longer need this code under arch/mips. [ralf@linux-mips.org: Fix conflicts.] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8853/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle
parent
4b049a6b27
commit
e5a6fcc058
@@ -1,37 +0,0 @@
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* Interrupt Controller
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Properties:
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- compatible: "brcm,bcm3384-intc"
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Compatibility with BCM3384 and possibly other BCM33xx/BCM63xx SoCs.
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- reg: Address/length pairs for each mask/status register set. Length must
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be 8. If multiple register sets are specified, the first set will
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handle IRQ offsets 0..31, the second set 32..63, and so on.
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- interrupt-controller: This is an interrupt controller.
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- #interrupt-cells: Must be <1>. Just a simple IRQ offset; no level/edge
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or polarity configuration is possible with this controller.
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- interrupt-parent: This controller is cascaded from a MIPS CPU HW IRQ, or
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from another INTC.
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- interrupts: The IRQ on the parent controller.
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Example:
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periph_intc: periph_intc@14e00038 {
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compatible = "brcm,bcm3384-intc";
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/*
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* IRQs 0..31: mask reg 0x14e00038, status reg 0x14e0003c
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* IRQs 32..63: mask reg 0x14e00340, status reg 0x14e00344
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*/
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reg = <0x14e00038 0x8 0x14e00340 0x8>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <4>;
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};
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