IB/ipath: Fix many locking issues when switching to error state
The send DMA hardware queue voided a number of prior assumptions about when a send is complete which led to completions being generated out of order. There were also a number of locking issues when switching the QP to the error or reset states, and we implement the IB_QPS_SQD state. Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Este cometimento está contido em:

cometido por
Roland Dreier

ascendente
53dc1ca194
cometimento
e509be898d
@@ -111,16 +111,24 @@ static unsigned int ib_ipath_disable_sma;
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module_param_named(disable_sma, ib_ipath_disable_sma, uint, S_IWUSR | S_IRUGO);
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MODULE_PARM_DESC(disable_sma, "Disable the SMA");
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/*
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* Note that it is OK to post send work requests in the SQE and ERR
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* states; ipath_do_send() will process them and generate error
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* completions as per IB 1.2 C10-96.
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*/
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const int ib_ipath_state_ops[IB_QPS_ERR + 1] = {
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[IB_QPS_RESET] = 0,
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[IB_QPS_INIT] = IPATH_POST_RECV_OK,
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[IB_QPS_RTR] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
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[IB_QPS_RTS] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
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IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
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IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK |
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IPATH_PROCESS_NEXT_SEND_OK,
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[IB_QPS_SQD] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
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IPATH_POST_SEND_OK,
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[IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
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[IB_QPS_ERR] = 0,
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IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
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[IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
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IPATH_POST_SEND_OK | IPATH_FLUSH_SEND,
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[IB_QPS_ERR] = IPATH_POST_RECV_OK | IPATH_FLUSH_RECV |
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IPATH_POST_SEND_OK | IPATH_FLUSH_SEND,
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};
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struct ipath_ucontext {
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@@ -230,18 +238,6 @@ void ipath_skip_sge(struct ipath_sge_state *ss, u32 length)
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}
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}
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static void ipath_flush_wqe(struct ipath_qp *qp, struct ib_send_wr *wr)
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{
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struct ib_wc wc;
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memset(&wc, 0, sizeof(wc));
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wc.wr_id = wr->wr_id;
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wc.status = IB_WC_WR_FLUSH_ERR;
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wc.opcode = ib_ipath_wc_opcode[wr->opcode];
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wc.qp = &qp->ibqp;
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ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 1);
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}
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/*
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* Count the number of DMA descriptors needed to send length bytes of data.
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* Don't modify the ipath_sge_state to get the count.
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@@ -347,14 +343,8 @@ static int ipath_post_one_send(struct ipath_qp *qp, struct ib_send_wr *wr)
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spin_lock_irqsave(&qp->s_lock, flags);
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/* Check that state is OK to post send. */
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if (unlikely(!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK))) {
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if (qp->state != IB_QPS_SQE && qp->state != IB_QPS_ERR)
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goto bail_inval;
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/* C10-96 says generate a flushed completion entry. */
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ipath_flush_wqe(qp, wr);
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ret = 0;
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goto bail;
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}
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if (unlikely(!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK)))
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goto bail_inval;
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/* IB spec says that num_sge == 0 is OK. */
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if (wr->num_sge > qp->s_max_sge)
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@@ -677,6 +667,7 @@ bail:;
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static void ipath_ib_timer(struct ipath_ibdev *dev)
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{
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struct ipath_qp *resend = NULL;
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struct ipath_qp *rnr = NULL;
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struct list_head *last;
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struct ipath_qp *qp;
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unsigned long flags;
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@@ -703,7 +694,9 @@ static void ipath_ib_timer(struct ipath_ibdev *dev)
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if (--qp->s_rnr_timeout == 0) {
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do {
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list_del_init(&qp->timerwait);
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tasklet_hi_schedule(&qp->s_task);
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qp->timer_next = rnr;
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rnr = qp;
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atomic_inc(&qp->refcount);
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if (list_empty(last))
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break;
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qp = list_entry(last->next, struct ipath_qp,
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@@ -743,14 +736,31 @@ static void ipath_ib_timer(struct ipath_ibdev *dev)
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spin_unlock_irqrestore(&dev->pending_lock, flags);
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/* XXX What if timer fires again while this is running? */
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for (qp = resend; qp != NULL; qp = qp->timer_next) {
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while (resend != NULL) {
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qp = resend;
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resend = qp->timer_next;
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spin_lock_irqsave(&qp->s_lock, flags);
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if (qp->s_last != qp->s_tail && qp->state == IB_QPS_RTS) {
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if (qp->s_last != qp->s_tail &&
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ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK) {
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dev->n_timeouts++;
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ipath_restart_rc(qp, qp->s_last_psn + 1);
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}
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spin_unlock_irqrestore(&qp->s_lock, flags);
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/* Notify ipath_destroy_qp() if it is waiting. */
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if (atomic_dec_and_test(&qp->refcount))
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wake_up(&qp->wait);
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}
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while (rnr != NULL) {
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qp = rnr;
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rnr = qp->timer_next;
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spin_lock_irqsave(&qp->s_lock, flags);
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if (ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK)
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ipath_schedule_send(qp);
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spin_unlock_irqrestore(&qp->s_lock, flags);
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/* Notify ipath_destroy_qp() if it is waiting. */
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if (atomic_dec_and_test(&qp->refcount))
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wake_up(&qp->wait);
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@@ -1010,13 +1020,24 @@ static void sdma_complete(void *cookie, int status)
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struct ipath_verbs_txreq *tx = cookie;
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struct ipath_qp *qp = tx->qp;
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struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
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unsigned int flags;
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enum ib_wc_status ibs = status == IPATH_SDMA_TXREQ_S_OK ?
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IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR;
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/* Generate a completion queue entry if needed */
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if (qp->ibqp.qp_type != IB_QPT_RC && tx->wqe) {
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enum ib_wc_status ibs = status == IPATH_SDMA_TXREQ_S_OK ?
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IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR;
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if (atomic_dec_and_test(&qp->s_dma_busy)) {
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spin_lock_irqsave(&qp->s_lock, flags);
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if (tx->wqe)
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ipath_send_complete(qp, tx->wqe, ibs);
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if ((ib_ipath_state_ops[qp->state] & IPATH_FLUSH_SEND &&
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qp->s_last != qp->s_head) ||
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(qp->s_flags & IPATH_S_WAIT_DMA))
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ipath_schedule_send(qp);
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spin_unlock_irqrestore(&qp->s_lock, flags);
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wake_up(&qp->wait_dma);
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} else if (tx->wqe) {
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spin_lock_irqsave(&qp->s_lock, flags);
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ipath_send_complete(qp, tx->wqe, ibs);
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spin_unlock_irqrestore(&qp->s_lock, flags);
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}
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if (tx->txreq.flags & IPATH_SDMA_TXREQ_F_FREEBUF)
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@@ -1027,6 +1048,21 @@ static void sdma_complete(void *cookie, int status)
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wake_up(&qp->wait);
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}
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static void decrement_dma_busy(struct ipath_qp *qp)
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{
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unsigned int flags;
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if (atomic_dec_and_test(&qp->s_dma_busy)) {
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spin_lock_irqsave(&qp->s_lock, flags);
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if ((ib_ipath_state_ops[qp->state] & IPATH_FLUSH_SEND &&
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qp->s_last != qp->s_head) ||
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(qp->s_flags & IPATH_S_WAIT_DMA))
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ipath_schedule_send(qp);
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spin_unlock_irqrestore(&qp->s_lock, flags);
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wake_up(&qp->wait_dma);
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}
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}
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/*
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* Compute the number of clock cycles of delay before sending the next packet.
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* The multipliers reflect the number of clocks for the fastest rate so
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@@ -1065,9 +1101,12 @@ static int ipath_verbs_send_dma(struct ipath_qp *qp,
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if (tx) {
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qp->s_tx = NULL;
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/* resend previously constructed packet */
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atomic_inc(&qp->s_dma_busy);
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ret = ipath_sdma_verbs_send(dd, tx->ss, tx->len, tx);
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if (ret)
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if (ret) {
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qp->s_tx = tx;
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decrement_dma_busy(qp);
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}
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goto bail;
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}
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@@ -1118,12 +1157,14 @@ static int ipath_verbs_send_dma(struct ipath_qp *qp,
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tx->txreq.sg_count = ndesc;
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tx->map_len = (hdrwords + 2) << 2;
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tx->txreq.map_addr = &tx->hdr;
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atomic_inc(&qp->s_dma_busy);
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ret = ipath_sdma_verbs_send(dd, ss, dwords, tx);
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if (ret) {
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/* save ss and length in dwords */
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tx->ss = ss;
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tx->len = dwords;
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qp->s_tx = tx;
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decrement_dma_busy(qp);
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}
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goto bail;
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}
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@@ -1144,6 +1185,7 @@ static int ipath_verbs_send_dma(struct ipath_qp *qp,
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memcpy(piobuf, hdr, hdrwords << 2);
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ipath_copy_from_sge(piobuf + hdrwords, ss, len);
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atomic_inc(&qp->s_dma_busy);
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ret = ipath_sdma_verbs_send(dd, NULL, 0, tx);
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/*
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* If we couldn't queue the DMA request, save the info
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@@ -1154,6 +1196,7 @@ static int ipath_verbs_send_dma(struct ipath_qp *qp,
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tx->ss = NULL;
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tx->len = 0;
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qp->s_tx = tx;
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decrement_dma_busy(qp);
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}
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dev->n_unaligned++;
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goto bail;
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@@ -1177,6 +1220,7 @@ static int ipath_verbs_send_pio(struct ipath_qp *qp,
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unsigned flush_wc;
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u32 control;
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int ret;
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unsigned int flags;
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piobuf = ipath_getpiobuf(dd, plen, NULL);
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if (unlikely(piobuf == NULL)) {
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@@ -1247,8 +1291,11 @@ static int ipath_verbs_send_pio(struct ipath_qp *qp,
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}
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copy_io(piobuf, ss, len, flush_wc);
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done:
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if (qp->s_wqe)
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if (qp->s_wqe) {
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spin_lock_irqsave(&qp->s_lock, flags);
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ipath_send_complete(qp, qp->s_wqe, IB_WC_SUCCESS);
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spin_unlock_irqrestore(&qp->s_lock, flags);
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}
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ret = 0;
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bail:
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return ret;
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@@ -1281,19 +1328,12 @@ int ipath_verbs_send(struct ipath_qp *qp, struct ipath_ib_header *hdr,
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* can defer SDMA restart until link goes ACTIVE without
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* worrying about just how we got there.
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*/
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if (qp->ibqp.qp_type == IB_QPT_SMI)
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if (qp->ibqp.qp_type == IB_QPT_SMI ||
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!(dd->ipath_flags & IPATH_HAS_SEND_DMA))
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ret = ipath_verbs_send_pio(qp, hdr, hdrwords, ss, len,
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plen, dwords);
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/* All non-VL15 packets are dropped if link is not ACTIVE */
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else if (!(dd->ipath_flags & IPATH_LINKACTIVE)) {
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if (qp->s_wqe)
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ipath_send_complete(qp, qp->s_wqe, IB_WC_SUCCESS);
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ret = 0;
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} else if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
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ret = ipath_verbs_send_dma(qp, hdr, hdrwords, ss, len,
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plen, dwords);
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else
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ret = ipath_verbs_send_pio(qp, hdr, hdrwords, ss, len,
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ret = ipath_verbs_send_dma(qp, hdr, hdrwords, ss, len,
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plen, dwords);
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return ret;
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@@ -1401,27 +1441,46 @@ bail:
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* This is called from ipath_intr() at interrupt level when a PIO buffer is
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* available after ipath_verbs_send() returned an error that no buffers were
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* available. Return 1 if we consumed all the PIO buffers and we still have
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* QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
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* QPs waiting for buffers (for now, just restart the send tasklet and
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* return zero).
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*/
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int ipath_ib_piobufavail(struct ipath_ibdev *dev)
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{
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struct list_head *list;
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struct ipath_qp *qplist;
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struct ipath_qp *qp;
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unsigned long flags;
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if (dev == NULL)
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goto bail;
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list = &dev->piowait;
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qplist = NULL;
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spin_lock_irqsave(&dev->pending_lock, flags);
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while (!list_empty(&dev->piowait)) {
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qp = list_entry(dev->piowait.next, struct ipath_qp,
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piowait);
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while (!list_empty(list)) {
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qp = list_entry(list->next, struct ipath_qp, piowait);
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list_del_init(&qp->piowait);
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clear_bit(IPATH_S_BUSY, &qp->s_busy);
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tasklet_hi_schedule(&qp->s_task);
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qp->pio_next = qplist;
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qplist = qp;
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atomic_inc(&qp->refcount);
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}
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spin_unlock_irqrestore(&dev->pending_lock, flags);
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while (qplist != NULL) {
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qp = qplist;
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qplist = qp->pio_next;
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spin_lock_irqsave(&qp->s_lock, flags);
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if (ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK)
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ipath_schedule_send(qp);
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spin_unlock_irqrestore(&qp->s_lock, flags);
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/* Notify ipath_destroy_qp() if it is waiting. */
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if (atomic_dec_and_test(&qp->refcount))
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wake_up(&qp->wait);
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}
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bail:
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return 0;
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}
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@@ -2143,11 +2202,12 @@ bail:
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void ipath_unregister_ib_device(struct ipath_ibdev *dev)
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{
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struct ib_device *ibdev = &dev->ibdev;
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disable_timer(dev->dd);
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u32 qps_inuse;
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ib_unregister_device(ibdev);
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disable_timer(dev->dd);
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if (!list_empty(&dev->pending[0]) ||
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!list_empty(&dev->pending[1]) ||
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!list_empty(&dev->pending[2]))
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@@ -2162,7 +2222,10 @@ void ipath_unregister_ib_device(struct ipath_ibdev *dev)
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* Note that ipath_unregister_ib_device() can be called before all
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* the QPs are destroyed!
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*/
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ipath_free_all_qps(&dev->qp_table);
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qps_inuse = ipath_free_all_qps(&dev->qp_table);
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if (qps_inuse)
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ipath_dev_err(dev->dd, "QP memory leak! %u still in use\n",
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qps_inuse);
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kfree(dev->qp_table.table);
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kfree(dev->lk_table.table);
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kfree(dev->txreq_bufs);
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@@ -2213,17 +2276,14 @@ static ssize_t show_stats(struct device *device, struct device_attribute *attr,
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"RC OTH NAKs %d\n"
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"RC timeouts %d\n"
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"RC RDMA dup %d\n"
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"RC stalls %d\n"
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"piobuf wait %d\n"
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"no piobuf %d\n"
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"unaligned %d\n"
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"PKT drops %d\n"
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"WQE errs %d\n",
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dev->n_rc_resends, dev->n_rc_qacks, dev->n_rc_acks,
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dev->n_seq_naks, dev->n_rdma_seq, dev->n_rnr_naks,
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dev->n_other_naks, dev->n_timeouts,
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dev->n_rdma_dup_busy, dev->n_rc_stalls, dev->n_piowait,
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dev->n_no_piobuf, dev->n_unaligned,
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dev->n_rdma_dup_busy, dev->n_piowait, dev->n_unaligned,
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dev->n_pkt_drops, dev->n_wqe_errs);
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for (i = 0; i < ARRAY_SIZE(dev->opstats); i++) {
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const struct ipath_opcode_stats *si = &dev->opstats[i];
|
||||
|
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