ASoC: Intel: Skylake: Add pipe and modules handlers
SKL driver needs to instantiate pipelines and modules in the DSP. The topology in the DSP is modelled as DAPM graph with a PGA representing a module instance and mixer representing a pipeline for a group of modules along with the mixer itself. Here we start adding building block for handling these. We add resource checks (memory/compute) for pipelines, find the modules in a pipeline, init modules in a pipe and lastly bind/unbind modules in a pipe These will be used by pipe event handlers in subsequent patches Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@@ -48,6 +48,13 @@
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#define AZX_REG_VS_SDXEFIFOS_XBASE 0x1094
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#define AZX_REG_VS_SDXEFIFOS_XINTERVAL 0x20
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struct skl_dsp_resource {
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u32 max_mcps;
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u32 max_mem;
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u32 mcps;
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u32 mem;
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};
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struct skl {
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struct hdac_ext_bus ebus;
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struct pci_dev *pci;
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@@ -57,6 +64,10 @@ struct skl {
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void __iomem *nhlt; /* nhlt ptr */
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struct skl_sst *skl_sst; /* sst skl ctx */
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struct skl_dsp_resource resource;
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struct list_head ppl_list;
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struct list_head dapm_path_list;
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};
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#define skl_to_ebus(s) (&(s)->ebus)
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