Merge branch 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm
Pull operating performance points (OPP) framework changes for 5.4 from Viresh Kumar: "This contains: - OPP core fixes to better support genpd devices (Viresh Kumar). - OPP core changes to support multiple suspend-opps in DT (Anson Huang). - New OPP API (dev_pm_opp_find_level_exact()) and Qcom OPP binding changes for CPR (Niklas Cassel). - Qcom minor update (Sricharan R). - OPP Documentation fix (Yue Hu). - OPP core support to enable/disable regulators (k.konieczny)." * 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: dt-bindings: opp: Add qcom-opp bindings with properties needed for CPR dt-bindings: opp: qcom-nvmem: Support pstates provided by a power domain dt-bindings: opp: qcom-nvmem: Make speedbin related properties optional dt-bindings: opp: Re-organise kryo cpufreq to use it for other nvmem based qcom socs PM / OPP: Correct Documentation about library location opp: of: Support multiple suspend OPPs defined in DT dt-bindings: opp: Support multiple opp-suspend properties opp: core: add regulators enable and disable opp: Don't decrement uninitialized list_kref opp: Add dev_pm_opp_find_level_exact() opp: Return genpd virtual devices from dev_pm_opp_attach_genpd() opp: Not all power-domains are scalable
This commit is contained in:
Rafael J. Wysocki
@@ -140,8 +140,8 @@ Optional properties:
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frequency for a short duration of time limited by the device's power, current
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and thermal limits.
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- opp-suspend: Marks the OPP to be used during device suspend. Only one OPP in
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the table should have this.
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- opp-suspend: Marks the OPP to be used during device suspend. If multiple OPPs
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in the table have this, the OPP with highest opp-hz will be used.
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- opp-supported-hw: This enables us to select only a subset of OPPs from the
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larger OPP table, based on what version of the hardware we are running on. We
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@@ -1,25 +1,38 @@
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Qualcomm Technologies, Inc. KRYO CPUFreq and OPP bindings
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Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings
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===================================
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In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
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that have KRYO processors, the CPU ferequencies subset and voltage value
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of each OPP varies based on the silicon variant in use.
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In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996,
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the CPU frequencies subset and voltage value of each OPP varies based on
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the silicon variant in use.
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Qualcomm Technologies, Inc. Process Voltage Scaling Tables
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defines the voltage and frequency value based on the msm-id in SMEM
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and speedbin blown in the efuse combination.
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The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
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The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
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to provide the OPP framework with required information (existing HW bitmap).
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This is used to determine the voltage and frequency value for each OPP of
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operating-points-v2 table when it is parsed by the OPP framework.
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Required properties:
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--------------------
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In 'cpus' nodes:
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In 'cpu' nodes:
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- operating-points-v2: Phandle to the operating-points-v2 table to use.
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In 'operating-points-v2' table:
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- compatible: Should be
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- 'operating-points-v2-kryo-cpu' for apq8096 and msm8996.
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Optional properties:
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--------------------
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In 'cpu' nodes:
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- power-domains: A phandle pointing to the PM domain specifier which provides
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the performance states available for active state management.
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Please refer to the power-domains bindings
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Documentation/devicetree/bindings/power/power_domain.txt
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and also examples below.
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- power-domain-names: Should be
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- 'cpr' for qcs404.
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In 'operating-points-v2' table:
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- nvmem-cells: A phandle pointing to a nvmem-cells node representing the
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efuse registers that has information about the
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speedbin that is used to select the right frequency/voltage
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@@ -678,3 +691,105 @@ soc {
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};
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};
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};
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Example 2:
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---------
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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CPU0: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x100>;
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....
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clocks = <&apcs_glb>;
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operating-points-v2 = <&cpu_opp_table>;
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power-domains = <&cpr>;
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power-domain-names = "cpr";
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};
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CPU1: cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x101>;
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....
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clocks = <&apcs_glb>;
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operating-points-v2 = <&cpu_opp_table>;
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power-domains = <&cpr>;
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power-domain-names = "cpr";
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};
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CPU2: cpu@102 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x102>;
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....
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clocks = <&apcs_glb>;
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operating-points-v2 = <&cpu_opp_table>;
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power-domains = <&cpr>;
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power-domain-names = "cpr";
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};
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CPU3: cpu@103 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x103>;
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....
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clocks = <&apcs_glb>;
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operating-points-v2 = <&cpu_opp_table>;
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power-domains = <&cpr>;
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power-domain-names = "cpr";
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};
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};
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cpu_opp_table: cpu-opp-table {
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compatible = "operating-points-v2-kryo-cpu";
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opp-shared;
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opp-1094400000 {
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opp-hz = /bits/ 64 <1094400000>;
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required-opps = <&cpr_opp1>;
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};
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opp-1248000000 {
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opp-hz = /bits/ 64 <1248000000>;
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required-opps = <&cpr_opp2>;
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};
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opp-1401600000 {
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opp-hz = /bits/ 64 <1401600000>;
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required-opps = <&cpr_opp3>;
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};
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};
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cpr_opp_table: cpr-opp-table {
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compatible = "operating-points-v2-qcom-level";
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cpr_opp1: opp1 {
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opp-level = <1>;
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qcom,opp-fuse-level = <1>;
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};
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cpr_opp2: opp2 {
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opp-level = <2>;
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qcom,opp-fuse-level = <2>;
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};
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cpr_opp3: opp3 {
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opp-level = <3>;
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qcom,opp-fuse-level = <3>;
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};
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};
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....
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soc {
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....
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cpr: power-controller@b018000 {
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compatible = "qcom,qcs404-cpr", "qcom,cpr";
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reg = <0x0b018000 0x1000>;
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....
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vdd-apc-supply = <&pms405_s3>;
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#power-domain-cells = <0>;
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operating-points-v2 = <&cpr_opp_table>;
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....
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};
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};
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19
Documentation/devicetree/bindings/opp/qcom-opp.txt
Normal file
19
Documentation/devicetree/bindings/opp/qcom-opp.txt
Normal file
@@ -0,0 +1,19 @@
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Qualcomm OPP bindings to describe OPP nodes
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The bindings are based on top of the operating-points-v2 bindings
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described in Documentation/devicetree/bindings/opp/opp.txt
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Additional properties are described below.
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* OPP Table Node
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Required properties:
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- compatible: Allow OPPs to express their compatibility. It should be:
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"operating-points-v2-qcom-level"
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* OPP Node
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Required properties:
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- qcom,opp-fuse-level: A positive value representing the fuse corner/level
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associated with this OPP node. Sometimes several corners/levels shares
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a certain fuse corner/level. A fuse corner/level contains e.g. ref uV,
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min uV, and max uV.
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