Merge tag 'dmaengine-4.10-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul: "Fairly routine update this time around with all changes specific to drivers: - New driver for STMicroelectronics FDMA - Memory-to-memory transfers on dw dmac - Support for slave maps on pl08x devices - Bunch of driver fixes to use dma_pool_zalloc - Bunch of compile and warning fixes spread across drivers" [ The ST FDMA driver already came in earlier through the remoteproc tree ] * tag 'dmaengine-4.10-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits) dmaengine: sirf-dma: remove unused ‘sdesc’ dmaengine: pl330: remove unused ‘regs’ dmaengine: s3c24xx: remove unused ‘cdata’ dmaengine: stm32-dma: remove unused ‘src_addr’ dmaengine: stm32-dma: remove unused ‘dst_addr’ dmaengine: stm32-dma: remove unused ‘sfcr’ dmaengine: pch_dma: remove unused ‘cookie’ dmaengine: mic_x100_dma: remove unused ‘data’ dmaengine: img-mdc: remove unused ‘prev_phys’ dmaengine: usb-dmac: remove unused ‘uchan’ dmaengine: ioat: remove unused ‘res’ dmaengine: ioat: remove unused ‘ioat_dma’ dmaengine: ioat: remove unused ‘is_raid_device’ dmaengine: pl330: do not generate unaligned access dmaengine: k3dma: move to dma_pool_zalloc dmaengine: at_hdmac: move to dma_pool_zalloc dmaengine: at_xdmac: don't restore unsaved status dmaengine: ioat: set error code on failures dmaengine: ioat: set error code on failures dmaengine: DW DMAC: add multi-block property to device tree ...
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@@ -23,6 +23,14 @@ Required properties
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#define NBPF_SLAVE_RQ_LEVEL 4
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Optional properties:
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- max-burst-mem-read: limit burst size for memory reads
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(DMA_MEM_TO_MEM/DMA_MEM_TO_DEV) to this value, specified in bytes, rather
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than using the maximum burst size allowed by the hardware's buffer size.
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- max-burst-mem-write: limit burst size for memory writes
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(DMA_DEV_TO_MEM/DMA_MEM_TO_MEM) to this value, specified in bytes, rather
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than using the maximum burst size allowed by the hardware's buffer size.
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If both max-burst-mem-read and max-burst-mem-write are set, DMA_MEM_TO_MEM
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will use the lower value.
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You can use dma-channels and dma-requests as described in dma.txt, although they
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won't be used, this information is derived from the compatibility string.
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@@ -5,13 +5,13 @@ memcpy and memset capabilities. It has been designed for virtualized
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environments.
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Each HIDMA HW instance consists of multiple DMA channels. These channels
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share the same bandwidth. The bandwidth utilization can be parititioned
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share the same bandwidth. The bandwidth utilization can be partitioned
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among channels based on the priority and weight assignments.
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There are only two priority levels and 15 weigh assignments possible.
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Other parameters here determine how much of the system bus this HIDMA
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instance can use like maximum read/write request and and number of bytes to
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instance can use like maximum read/write request and number of bytes to
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read/write in a single burst.
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Main node required properties:
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@@ -47,12 +47,18 @@ When the OS is not in control of the management interface (i.e. it's a guest),
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the channel nodes appear on their own, not under a management node.
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Required properties:
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- compatible: must contain "qcom,hidma-1.0"
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- compatible: must contain "qcom,hidma-1.0" for initial HW or "qcom,hidma-1.1"
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for MSI capable HW.
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- reg: Addresses for the transfer and event channel
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- interrupts: Should contain the event interrupt
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- desc-count: Number of asynchronous requests this channel can handle
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- iommus: required a iommu node
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Optional properties for MSI:
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- msi-parent : See the generic MSI binding described in
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devicetree/bindings/interrupt-controller/msi.txt for a description of the
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msi-parent property.
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Example:
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Hypervisor OS configuration:
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@@ -24,6 +24,7 @@ Required Properties:
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- "renesas,dmac-r8a7793" (R-Car M2-N)
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- "renesas,dmac-r8a7794" (R-Car E2)
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- "renesas,dmac-r8a7795" (R-Car H3)
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- "renesas,dmac-r8a7796" (R-Car M3-W)
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- reg: base address and length of the registers block for the DMAC
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@@ -27,6 +27,8 @@ Optional properties:
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that services interrupts for this device
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- is_private: The device channels should be marked as private and not for by the
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general purpose DMA channel allocator. False if not passed.
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- multi-block: Multi block transfers supported by hardware. Array property with
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one cell per channel. 0: not supported, 1 (default): supported.
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Example:
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