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Merge tag 'renesas-pinmux2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

Browse Source 
Second round of Renesas ARM and SH based SoC pinmux updates for v3.10

Highlights:

* Compilation fixes for sh7269 and for when CONFIG_BUG is not set
* sh-pfc Support for r8a73a4 SoC
* Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC

This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10

* tag 'renesas-pinmux2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (185 commits)
  sh-pfc: r8a73a4: Remove unused GPIO bias data
  ARM: shmobile: r8a73a4: Remove all GPIO enums
  sh-pfc: r8a73a4: Remove function GPIOs
  ARM: shmobile: r8a73a4: Remove IRQC function GPIOs
  ARM: shmobile: r8a73a4: Remove SCIF function GPIOs
  sh-pfc: r8a73a4: Remove IRQC function GPIOS
  sh-pfc: r8a73a4: Remove SCIF function GPIOS
  sh-pfc: r8a73a4: Add IRQC pin groups and functions
  sh-pfc: r8a73a4: Add SCIF pin groups and functions
  sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support
  sh-pfc: r8a73a4: GPIO IRQ support
  sh-pfc: r8a73a4: Support sparse GPIO numbers
  sh-pfc: Add r8a73a4 pinmux support
  sh-pfc: r8a7779: Split DU input and output pixel clocks
  sh-pfc: r8a7779: Remove GPIO data
  ARM: shmobile: r8a7779: Register GPIO devices
  sh-pfc: Configure pins as GPIOs at request time when handled externally
  sh-pfc: Skip gpiochip registration when no GPIO resource is found
  sh-pfc: Make GPIO support optional
  sh-pfc: Make function GPIOs support optional
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2013-04-02 23:06:48 -07:00
parent 2f7053e0ec 202ac6a21a
commit e382328a81
86 changed files with 13073 additions and 6325 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/spear1310.dtsi
View File

@@ -89,7 +89,7 @@
pinmux: pinmux@e0700000 {
compatible = "st,spear1310-pinmux";
reg = <0xe0700000 0x1000>;
#gpio-range-cells = <2>;
#gpio-range-cells = <3>;
};
apb {
@@ -212,7 +212,7 @@
interrupt-controller;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinmux 0 246>;
gpio-ranges = <&pinmux 0 0 246>;
status = "disabled";
st-plgpio,ngpio = <246>;

4
arch/arm/boot/dts/spear1340.dtsi
View File

@@ -63,7 +63,7 @@
pinmux: pinmux@e0700000 {
compatible = "st,spear1340-pinmux";
reg = <0xe0700000 0x1000>;
#gpio-range-cells = <2>;
#gpio-range-cells = <3>;
};
pwm: pwm@e0180000 {
@@ -127,7 +127,7 @@
interrupt-controller;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinmux 0 252>;
gpio-ranges = <&pinmux 0 0 252>;
status = "disabled";
st-plgpio,ngpio = <250>;

4
arch/arm/boot/dts/spear310.dtsi
View File

@@ -25,7 +25,7 @@
pinmux: pinmux@b4000000 {
compatible = "st,spear310-pinmux";
reg = <0xb4000000 0x1000>;
#gpio-range-cells = <2>;
#gpio-range-cells = <3>;
};
fsmc: flash@44000000 {
@@ -102,7 +102,7 @@
interrupt-controller;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinmux 0 102>;
gpio-ranges = <&pinmux 0 0 102>;
status = "disabled";
st-plgpio,ngpio = <102>;

4
arch/arm/boot/dts/spear320.dtsi
View File

@@ -24,7 +24,7 @@
pinmux: pinmux@b3000000 {
compatible = "st,spear320-pinmux";
reg = <0xb3000000 0x1000>;
#gpio-range-cells = <2>;
#gpio-range-cells = <3>;
};
clcd@90000000 {
@@ -130,7 +130,7 @@
interrupt-controller;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinmux 0 102>;
gpio-ranges = <&pinmux 0 0 102>;
status = "disabled";
st-plgpio,ngpio = <102>;