Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflags
* git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflags: Fix IRQ flag handling naming MIPS: Add missing #inclusions of <linux/irq.h> smc91x: Add missing #inclusion of <linux/irq.h> Drop a couple of unnecessary asm/system.h inclusions SH: Add missing consts to sys_execve() declaration Blackfin: Rename IRQ flags handling functions Blackfin: Add missing dep to asm/irqflags.h Blackfin: Rename DES PC2() symbol to avoid collision Blackfin: Split the BF532 BFIN_*_FIO_FLAG() functions to their own header Blackfin: Split PLL code from mach-specific cdef headers
This commit is contained in:
Linus Torvalds
104
arch/m32r/include/asm/irqflags.h
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104
arch/m32r/include/asm/irqflags.h
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@@ -0,0 +1,104 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
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* Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
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*/
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#ifndef _ASM_M32R_IRQFLAGS_H
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#define _ASM_M32R_IRQFLAGS_H
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#include <linux/types.h>
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static inline unsigned long arch_local_save_flags(void)
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{
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unsigned long flags;
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asm volatile("mvfc %0,psw" : "=r"(flags));
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return flags;
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}
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static inline void arch_local_irq_disable(void)
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{
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#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
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asm volatile (
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"clrpsw #0x40 -> nop"
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: : : "memory");
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#else
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unsigned long tmpreg0, tmpreg1;
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asm volatile (
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"ld24 %0, #0 ; Use 32-bit insn. \n\t"
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"mvfc %1, psw ; No interrupt can be accepted here. \n\t"
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"mvtc %0, psw \n\t"
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"and3 %0, %1, #0xffbf \n\t"
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"mvtc %0, psw \n\t"
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: "=&r" (tmpreg0), "=&r" (tmpreg1)
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:
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: "cbit", "memory");
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#endif
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}
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static inline void arch_local_irq_enable(void)
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{
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#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
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asm volatile (
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"setpsw #0x40 -> nop"
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: : : "memory");
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#else
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unsigned long tmpreg;
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asm volatile (
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"mvfc %0, psw; \n\t"
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"or3 %0, %0, #0x0040; \n\t"
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"mvtc %0, psw; \n\t"
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: "=&r" (tmpreg)
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:
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: "cbit", "memory");
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#endif
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}
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
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asm volatile (
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"mvfc %0, psw; \n\t"
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"clrpsw #0x40 -> nop; \n\t"
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: "=r" (flags)
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:
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: "memory");
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#else
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unsigned long tmpreg;
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asm volatile (
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"ld24 %1, #0 \n\t"
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"mvfc %0, psw \n\t"
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"mvtc %1, psw \n\t"
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"and3 %1, %0, #0xffbf \n\t"
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"mvtc %1, psw \n\t"
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: "=r" (flags), "=&r" (tmpreg)
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:
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: "cbit", "memory");
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#endif
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return flags;
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}
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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asm volatile("mvtc %0,psw"
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:
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: "r" (flags)
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: "cbit", "memory");
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}
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static inline bool arch_irqs_disabled_flags(unsigned long flags)
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{
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return !(flags & 0x40);
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}
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static inline bool arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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#endif /* _ASM_M32R_IRQFLAGS_H */
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@@ -11,6 +11,7 @@
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*/
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#include <linux/compiler.h>
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#include <linux/irqflags.h>
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#include <asm/assembler.h>
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#ifdef __KERNEL__
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@@ -54,71 +55,6 @@
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); \
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} while(0)
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/* Interrupt Control */
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#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
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#define local_irq_enable() \
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__asm__ __volatile__ ("setpsw #0x40 -> nop": : :"memory")
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#define local_irq_disable() \
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__asm__ __volatile__ ("clrpsw #0x40 -> nop": : :"memory")
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#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
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static inline void local_irq_enable(void)
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{
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unsigned long tmpreg;
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__asm__ __volatile__(
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"mvfc %0, psw; \n\t"
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"or3 %0, %0, #0x0040; \n\t"
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"mvtc %0, psw; \n\t"
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: "=&r" (tmpreg) : : "cbit", "memory");
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}
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static inline void local_irq_disable(void)
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{
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unsigned long tmpreg0, tmpreg1;
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__asm__ __volatile__(
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"ld24 %0, #0 ; Use 32-bit insn. \n\t"
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"mvfc %1, psw ; No interrupt can be accepted here. \n\t"
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"mvtc %0, psw \n\t"
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"and3 %0, %1, #0xffbf \n\t"
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"mvtc %0, psw \n\t"
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: "=&r" (tmpreg0), "=&r" (tmpreg1) : : "cbit", "memory");
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}
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#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
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#define local_save_flags(x) \
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__asm__ __volatile__("mvfc %0,psw" : "=r"(x) : /* no input */)
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#define local_irq_restore(x) \
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__asm__ __volatile__("mvtc %0,psw" : /* no outputs */ \
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: "r" (x) : "cbit", "memory")
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#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
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#define local_irq_save(x) \
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__asm__ __volatile__( \
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"mvfc %0, psw; \n\t" \
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"clrpsw #0x40 -> nop; \n\t" \
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: "=r" (x) : /* no input */ : "memory")
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#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
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#define local_irq_save(x) \
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({ \
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unsigned long tmpreg; \
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__asm__ __volatile__( \
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"ld24 %1, #0 \n\t" \
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"mvfc %0, psw \n\t" \
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"mvtc %1, psw \n\t" \
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"and3 %1, %0, #0xffbf \n\t" \
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"mvtc %1, psw \n\t" \
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: "=r" (x), "=&r" (tmpreg) \
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: : "cbit", "memory"); \
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})
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#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
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#define irqs_disabled() \
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({ \
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unsigned long flags; \
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local_save_flags(flags); \
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!(flags & 0x40); \
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})
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#define nop() __asm__ __volatile__ ("nop" : : )
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#define xchg(ptr, x) \
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