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OF: pinctrl: MIPS: lantiq: adds support for FALCON SoC

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Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks
of up to 32 pins.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
This commit is contained in:
John Crispin
2012-05-20 00:33:56 +02:00
parent 3f8c50c9b1
commit e316cb2b16
5 changed files with 479 additions and 0 deletions
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4
arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
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@@ -57,6 +57,10 @@ extern __iomem void *ltq_sys1_membase;
#define ltq_sys1_w32_mask(clear, set, reg) \
ltq_sys1_w32((ltq_sys1_r32(reg) & ~(clear)) | (set), reg)
/* allow the gpio and pinctrl drivers to talk to eachother */
extern int pinctrl_falcon_get_range_size(int id);
extern void pinctrl_falcon_add_gpio_range(struct pinctrl_gpio_range *range);
/*
* to keep the irq code generic we need to define this to 0 as falcon
* has no EIU/EBU