i2c: brcmstb: Adding support for CM and DSL SoCs

Broadcoms DSL, CM (cable modem)and STB I2C core implementation have
8 data in/out registers that can transfer 8 bytes or 32 bytes max.
Cable and DSL "Peripheral" i2c cores use single byte per data
register and the STB can use 4 byte per data register transfer.
Adding support to take care of this difference. Accordingly added
the compatible string for SoCs using the "Peripheral" I2C block.

Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
Kamal Dasu
2015-12-16 15:49:09 -05:00
committed by Wolfram Sang
parent 8378d01f60
commit e2e5a2c618
2 changed files with 57 additions and 25 deletions

View File

@@ -2,7 +2,7 @@ Broadcom stb bsc iic master controller
Required properties:
- compatible: should be "brcm,brcmstb-i2c"
- compatible: should be "brcm,brcmstb-i2c" or "brcm,brcmper-i2c"
- clock-frequency: 32-bit decimal value of iic master clock freqency in Hz
valid values are 375000, 390000, 187500, 200000
93750, 97500, 46875 and 50000