dt-bindings: reset: imx7: Add support for i.MX8MM

i.MX8MM can reuse i.MX8MQ's reset driver, update the compatible
property and related info to support i.MX8MM.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Anson Huang
2019-07-05 16:54:05 +08:00
committed by Philipp Zabel
parent 5f9e832c13
commit e2557157a9
2 changed files with 18 additions and 16 deletions

View File

@@ -38,26 +38,26 @@
#define IMX8MQ_RESET_PCIEPHY_PERST 27
#define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28
#define IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF 29
#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30
#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_DISP_RESET 31
#define IMX8MQ_RESET_GPU_RESET 32
#define IMX8MQ_RESET_VPU_RESET 33
#define IMX8MQ_RESET_PCIEPHY2 34
#define IMX8MQ_RESET_PCIEPHY2_PERST 35
#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36
#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37
#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38
#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39
#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40
#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41
#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42
#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43
#define IMX8MQ_RESET_PCIEPHY2 34 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_PCIEPHY2_PERST 35 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_DDRC1_PRST 44
#define IMX8MQ_RESET_DDRC1_CORE_RESET 45
#define IMX8MQ_RESET_DDRC1_PHY_RESET 46
#define IMX8MQ_RESET_DDRC2_PRST 47
#define IMX8MQ_RESET_DDRC2_CORE_RESET 48
#define IMX8MQ_RESET_DDRC2_PHY_RESET 49
#define IMX8MQ_RESET_DDRC2_PRST 47 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_DDRC2_CORE_RESET 48 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_DDRC2_PHY_RESET 49 /* i.MX8MM does NOT support */
#define IMX8MQ_RESET_NUM 50