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sh: Kill off MAX_DMA_ADDRESS leftovers.

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We don't support the ISA DMA API, so this is only ever misused. The
dma-sh case inadvertently broke the dreamcast case by testing the wrong
variable for the total number of channels, so this fixes that up too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
2012-05-19 18:50:09 +09:00
parent 2ff9f317f1
commit e24cca19ba
5 changed files with 9 additions and 36 deletions
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16
arch/sh/include/asm/dma-sh.h
View File

@@ -32,21 +32,21 @@
#endif
static int dmte_irq_map[] __maybe_unused = {
#if (MAX_DMA_CHANNELS >= 4)
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 4)
DMTE0_IRQ,
DMTE0_IRQ + 1,
DMTE0_IRQ + 2,
DMTE0_IRQ + 3,
#endif
#if (MAX_DMA_CHANNELS >= 6)
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 6)
DMTE4_IRQ,
DMTE4_IRQ + 1,
#endif
#if (MAX_DMA_CHANNELS >= 8)
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 8)
DMTE6_IRQ,
DMTE6_IRQ + 1,
#endif
#if (MAX_DMA_CHANNELS >= 12)
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 12)
DMTE8_IRQ,
DMTE9_IRQ,
DMTE10_IRQ,
@@ -62,21 +62,21 @@ static int dmte_irq_map[] __maybe_unused = {
/* DMA base address */
static u32 dma_base_addr[] __maybe_unused = {
#if (MAX_DMA_CHANNELS >= 4)
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 4)
SH_DMAC_BASE0 + 0x00, /* channel 0 */
SH_DMAC_BASE0 + 0x10,
SH_DMAC_BASE0 + 0x20,
SH_DMAC_BASE0 + 0x30,
#endif
#if (MAX_DMA_CHANNELS >= 6)
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 6)
SH_DMAC_BASE0 + 0x50,
SH_DMAC_BASE0 + 0x60,
#endif
#if (MAX_DMA_CHANNELS >= 8)
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 8)
SH_DMAC_BASE1 + 0x00,
SH_DMAC_BASE1 + 0x10,
#endif
#if (MAX_DMA_CHANNELS >= 12)
#if (CONFIG_NR_ONCHIP_DMA_CHANNELS >= 12)
SH_DMAC_BASE1 + 0x20,
SH_DMAC_BASE1 + 0x30,
SH_DMAC_BASE1 + 0x50,

8
arch/sh/include/asm/dma.h
View File

@@ -17,14 +17,6 @@
#include <linux/device.h>
#include <asm-generic/dma.h>
#ifdef CONFIG_NR_DMA_CHANNELS
# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
#elif defined(CONFIG_NR_ONCHIP_DMA_CHANNELS)
# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
#else
# define MAX_DMA_CHANNELS 0
#endif
/*
* Read and write modes can mean drastically different things depending on the
* channel configuration. Consult your DMAC documentation and module