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MIPS: BCM63xx: Remove BCM6345 hacks to read base boot address

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Though BCM6345 does not technically have the same MPI register layout
than the other SoCs, reading the chip-select registers is done the same
way, and particularly for chip-select 0, which is the boot flash.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3009/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Florian Fainelli
2011-11-16 19:11:12 +01:00
committed by Ralf Baechle
parent d61fcfe2bb
commit e1c96c8620
2 changed files with 7 additions and 16 deletions
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2
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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@@ -215,7 +215,7 @@ enum bcm63xx_regs_set {
#define BCM_6345_ENETDMAS_BASE (0xfffe2a00)
#define BCM_6345_ENETSW_BASE (0xdeadbeef)
#define BCM_6345_PCMCIA_BASE (0xfffe2028)
#define BCM_6345_MPI_BASE (0xdeadbeef)
#define BCM_6345_MPI_BASE (0xfffe2000)
#define BCM_6345_OHCI0_BASE (0xfffe2100)
#define BCM_6345_OHCI_PRIV_BASE (0xfffe2200)
#define BCM_6345_USBH_PRIV_BASE (0xdeadbeef)