Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Device tree conversions for samsung and tegra Both platforms had some initial device tree support, but this adds much more to actually make it usable. * tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits) ARM: dts: Add intial dts file for EXYNOS4210 SoC, SMDKV310 and ORIGEN ARM: EXYNOS: Add Exynos4 device tree enabled board file rtc: rtc-s3c: Add device tree support input: samsung-keypad: Add device tree support ARM: S5PV210: Modify platform data for pl330 driver ARM: S5PC100: Modify platform data for pl330 driver ARM: S5P64x0: Modify platform data for pl330 driver ARM: EXYNOS: Add a alias for pdma clocks ARM: EXYNOS: Limit usage of pl330 device instance to non-dt build ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers DMA: PL330: Add device tree support ARM: EXYNOS: Modify platform data for pl330 driver DMA: PL330: Infer transfer direction from transfer request instead of platform data DMA: PL330: move filter function into driver serial: samsung: Fix build for non-Exynos4210 devices serial: samsung: add device tree support serial: samsung: merge probe() function from all SoC specific extensions serial: samsung: merge all SoC specific port reset functions ARM: SAMSUNG: register uart clocks to clock lookup list serial: samsung: remove all uses of get_clksrc and set_clksrc ... Fix up fairly trivial conflicts in arch/arm/mach-s3c2440/clock.c and drivers/tty/serial/Kconfig both due to just adding code close to changes.
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@@ -17,6 +17,8 @@
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#include <linux/gpio.h>
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#include <linux/sched.h>
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#include <linux/serial_core.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <asm/proc-fns.h>
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#include <asm/exception.h>
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@@ -385,6 +387,13 @@ static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
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}
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}
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#ifdef CONFIG_OF
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static const struct of_device_id exynos4_dt_irq_match[] = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
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{},
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};
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#endif
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void __init exynos4_init_irq(void)
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{
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int irq;
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@@ -392,7 +401,12 @@ void __init exynos4_init_irq(void)
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gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
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gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
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if (!of_have_populated_dt())
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gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
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#ifdef CONFIG_OF
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else
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of_irq_init(exynos4_dt_irq_match);
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#endif
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for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
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@@ -460,15 +474,6 @@ int __init exynos_init(void)
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return device_register(&exynos4_dev);
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}
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static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
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[0] = {
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.name = "uclk1",
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.divisor = 1,
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.min_baud = 0,
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.max_baud = 0,
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},
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};
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/* uart registration process */
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void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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@@ -476,16 +481,10 @@ void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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struct s3c2410_uartcfg *tcfg = cfg;
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u32 ucnt;
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for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
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if (!tcfg->clocks) {
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tcfg->has_fracval = 1;
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tcfg->clocks = exynos4_serial_clocks;
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tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
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}
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tcfg->flags |= NO_NEED_CHECK_CLKSRC;
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}
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for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
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tcfg->has_fracval = 1;
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s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
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s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no);
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}
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static DEFINE_SPINLOCK(eint_lock);
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