Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device-tree updates from Olof Johansson:
 "Part 1 of device-tree updates for 3.10.  The bulk of the churn in this
  branch is due to i.MX moving from C-defined pin control over to device
  tree, which is a one-time conversion that will allow greater
  flexibility down the road.

  Besides that, there's PCI-e bindings for Marvell mvebu platforms and a
  handful of cleanups to tegra due to the new include file functionality
  of the device tree compiler"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits)
  arm: mvebu: PCIe Device Tree informations for Armada XP GP
  arm: mvebu: PCIe Device Tree informations for Armada 370 DB
  arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
  arm: mvebu: PCIe Device Tree informations for Armada XP DB
  arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
  arm: mvebu: add PCIe Device Tree informations for Armada XP
  arm: mvebu: add PCIe Device Tree informations for Armada 370
  ARM: sunxi: unify osc24M_fixed and osc24M
  arm: vt8500: Add SDHC support to WM8505 DT
  ARM: dts: Add a 64 bits version of the skeleton device tree
  ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig
  ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board
  ARM: mvebu: Add support for NOR flash device on Armada XP-GP board
  ARM: mvebu: Add Device Bus support for Armada 370/XP SoC
  ARM: dts: imx6dl-wandboard: Add USB Host support
  ARM: dts: imx51 cpu node
  ARM: dts: Add missing imx27-phytec-phycore dtb target
  ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module
  ARM: i.MX51: Add PATA support
  ARM: dts: Add initial support for Wandboard Dual-Lite
  ...

Documentation/devicetree/bindings/timer/fsl,imxgpt.txt

@@ -0,0 +1,18 @@
+Freescale i.MX General Purpose Timer (GPT)
+
+Required properties:
+
+- compatible : should be "fsl,<soc>-gpt"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 4 interrupts; one per timer channel.
+- clocks : The clocks provided by the SoC to drive the timer.
+
+Example:
+
+gpt1: timer@10003000 {
+	compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
+	reg = <0x10003000 0x1000>;
+	interrupts = <26>;
+	clocks = <&clks 46>, <&clks 61>;
+	clock-names = "ipg", "per";
+};