UAPI: (Scripted) Disintegrate arch/tile/include/asm

Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Michael Kerrisk <mtk.manpages@gmail.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Dave Jones <davej@redhat.com>
This commit is contained in:
David Howells
2012-10-09 09:47:47 +01:00
parent 43e858598a
commit df842f79f0
22 changed files with 242 additions and 146 deletions

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@@ -1,3 +1,18 @@
# UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm
header-y += auxvec.h
header-y += bitsperlong.h
header-y += byteorder.h
header-y += cachectl.h
header-y += hardwall.h
header-y += kvm_para.h
header-y += mman.h
header-y += ptrace.h
header-y += setup.h
header-y += sigcontext.h
header-y += siginfo.h
header-y += signal.h
header-y += stat.h
header-y += swab.h
header-y += unistd.h

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@@ -0,0 +1,20 @@
/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _ASM_TILE_AUXVEC_H
#define _ASM_TILE_AUXVEC_H
/* No extensions to auxvec */
#endif /* _ASM_TILE_AUXVEC_H */

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _ASM_TILE_BITSPERLONG_H
#define _ASM_TILE_BITSPERLONG_H
#ifdef __LP64__
# define __BITS_PER_LONG 64
#else
# define __BITS_PER_LONG 32
#endif
#include <asm-generic/bitsperlong.h>
#endif /* _ASM_TILE_BITSPERLONG_H */

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/*
* Copyright 2011 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#if defined (__BIG_ENDIAN__)
#include <linux/byteorder/big_endian.h>
#elif defined (__LITTLE_ENDIAN__)
#include <linux/byteorder/little_endian.h>
#else
#error "__BIG_ENDIAN__ or __LITTLE_ENDIAN__ must be defined."
#endif

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/*
* Copyright 2011 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _ASM_TILE_CACHECTL_H
#define _ASM_TILE_CACHECTL_H
/*
* Options for cacheflush system call.
*
* The ICACHE flush is performed on all cores currently running the
* current process's address space. The intent is for user
* applications to be able to modify code, invoke the system call,
* then allow arbitrary other threads in the same address space to see
* the newly-modified code. Passing a length of CHIP_L1I_CACHE_SIZE()
* or more invalidates the entire icache on all cores in the address
* spaces. (Note: currently this option invalidates the entire icache
* regardless of the requested address and length, but we may choose
* to honor the arguments at some point.)
*
* Flush and invalidation of memory can normally be performed with the
* __insn_flush(), __insn_inv(), and __insn_finv() instructions from
* userspace. The DCACHE option to the system call allows userspace
* to flush the entire L1+L2 data cache from the core. In this case,
* the address and length arguments are not used. The DCACHE flush is
* restricted to the current core, not all cores in the address space.
*/
#define ICACHE (1<<0) /* invalidate L1 instruction cache */
#define DCACHE (1<<1) /* flush and invalidate data cache */
#define BCACHE (ICACHE|DCACHE) /* flush both caches */
#endif /* _ASM_TILE_CACHECTL_H */

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*
* Provide methods for access control of per-cpu resources like
* UDN, IDN, or IPI.
*/
#ifndef _UAPI_ASM_TILE_HARDWALL_H
#define _UAPI_ASM_TILE_HARDWALL_H
#include <arch/chip.h>
#include <linux/ioctl.h>
#define HARDWALL_IOCTL_BASE 0xa2
/*
* The HARDWALL_CREATE() ioctl is a macro with a "size" argument.
* The resulting ioctl value is passed to the kernel in conjunction
* with a pointer to a standard kernel bitmask of cpus.
* For network resources (UDN or IDN) the bitmask must physically
* represent a rectangular configuration on the chip.
* The "size" is the number of bytes of cpu mask data.
*/
#define _HARDWALL_CREATE 1
#define HARDWALL_CREATE(size) \
_IOC(_IOC_READ, HARDWALL_IOCTL_BASE, _HARDWALL_CREATE, (size))
#define _HARDWALL_ACTIVATE 2
#define HARDWALL_ACTIVATE \
_IO(HARDWALL_IOCTL_BASE, _HARDWALL_ACTIVATE)
#define _HARDWALL_DEACTIVATE 3
#define HARDWALL_DEACTIVATE \
_IO(HARDWALL_IOCTL_BASE, _HARDWALL_DEACTIVATE)
#define _HARDWALL_GET_ID 4
#define HARDWALL_GET_ID \
_IO(HARDWALL_IOCTL_BASE, _HARDWALL_GET_ID)
#endif /* _UAPI_ASM_TILE_HARDWALL_H */

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#include <asm-generic/kvm_para.h>

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _ASM_TILE_MMAN_H
#define _ASM_TILE_MMAN_H
#include <asm-generic/mman-common.h>
#include <arch/chip.h>
/* Standard Linux flags */
#define MAP_POPULATE 0x0040 /* populate (prefault) pagetables */
#define MAP_NONBLOCK 0x0080 /* do not block on IO */
#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
#define MAP_STACK MAP_GROWSDOWN /* provide convenience alias */
#define MAP_LOCKED 0x0200 /* pages are locked */
#define MAP_NORESERVE 0x0400 /* don't check for reservations */
#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
#define MAP_HUGETLB 0x4000 /* create a huge page mapping */
/*
* Flags for mlockall
*/
#define MCL_CURRENT 1 /* lock all current mappings */
#define MCL_FUTURE 2 /* lock all future mappings */
#endif /* _ASM_TILE_MMAN_H */

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _UAPI_ASM_TILE_PTRACE_H
#define _UAPI_ASM_TILE_PTRACE_H
#include <arch/chip.h>
#include <arch/abi.h>
/* These must match struct pt_regs, below. */
#if CHIP_WORD_SIZE() == 32
#define PTREGS_OFFSET_REG(n) ((n)*4)
#else
#define PTREGS_OFFSET_REG(n) ((n)*8)
#endif
#define PTREGS_OFFSET_BASE 0
#define PTREGS_OFFSET_TP PTREGS_OFFSET_REG(53)
#define PTREGS_OFFSET_SP PTREGS_OFFSET_REG(54)
#define PTREGS_OFFSET_LR PTREGS_OFFSET_REG(55)
#define PTREGS_NR_GPRS 56
#define PTREGS_OFFSET_PC PTREGS_OFFSET_REG(56)
#define PTREGS_OFFSET_EX1 PTREGS_OFFSET_REG(57)
#define PTREGS_OFFSET_FAULTNUM PTREGS_OFFSET_REG(58)
#define PTREGS_OFFSET_ORIG_R0 PTREGS_OFFSET_REG(59)
#define PTREGS_OFFSET_FLAGS PTREGS_OFFSET_REG(60)
#if CHIP_HAS_CMPEXCH()
#define PTREGS_OFFSET_CMPEXCH PTREGS_OFFSET_REG(61)
#endif
#define PTREGS_SIZE PTREGS_OFFSET_REG(64)
#ifndef __ASSEMBLY__
#ifndef __KERNEL__
/* Provide appropriate length type to userspace regardless of -m32/-m64. */
typedef uint_reg_t pt_reg_t;
#endif
/*
* This struct defines the way the registers are stored on the stack during a
* system call or exception. "struct sigcontext" has the same shape.
*/
struct pt_regs {
/* Saved main processor registers; 56..63 are special. */
/* tp, sp, and lr must immediately follow regs[] for aliasing. */
pt_reg_t regs[53];
pt_reg_t tp; /* aliases regs[TREG_TP] */
pt_reg_t sp; /* aliases regs[TREG_SP] */
pt_reg_t lr; /* aliases regs[TREG_LR] */
/* Saved special registers. */
pt_reg_t pc; /* stored in EX_CONTEXT_K_0 */
pt_reg_t ex1; /* stored in EX_CONTEXT_K_1 (PL and ICS bit) */
pt_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */
pt_reg_t orig_r0; /* r0 at syscall entry, else zero */
pt_reg_t flags; /* flags (see below) */
#if !CHIP_HAS_CMPEXCH()
pt_reg_t pad[3];
#else
pt_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */
pt_reg_t pad[2];
#endif
};
#endif /* __ASSEMBLY__ */
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
/* Support TILE-specific ptrace options, with events starting at 16. */
#define PTRACE_O_TRACEMIGRATE 0x00010000
#define PTRACE_EVENT_MIGRATE 16
#endif /* _UAPI_ASM_TILE_PTRACE_H */

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _UAPI_ASM_TILE_SETUP_H
#define _UAPI_ASM_TILE_SETUP_H
#define COMMAND_LINE_SIZE 2048
#endif /* _UAPI_ASM_TILE_SETUP_H */

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _ASM_TILE_SIGCONTEXT_H
#define _ASM_TILE_SIGCONTEXT_H
/* Don't pollute the namespace since <signal.h> includes this file. */
#define __need_int_reg_t
#include <arch/abi.h>
/*
* struct sigcontext has the same shape as struct pt_regs,
* but is simplified since we know the fault is from userspace.
*/
struct sigcontext {
__uint_reg_t gregs[53]; /* General-purpose registers. */
__uint_reg_t tp; /* Aliases gregs[TREG_TP]. */
__uint_reg_t sp; /* Aliases gregs[TREG_SP]. */
__uint_reg_t lr; /* Aliases gregs[TREG_LR]. */
__uint_reg_t pc; /* Program counter. */
__uint_reg_t ics; /* In Interrupt Critical Section? */
__uint_reg_t faultnum; /* Fault number. */
__uint_reg_t pad[5];
};
#endif /* _ASM_TILE_SIGCONTEXT_H */

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _ASM_TILE_SIGINFO_H
#define _ASM_TILE_SIGINFO_H
#define __ARCH_SI_TRAPNO
#ifdef __LP64__
# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
#endif
#include <asm-generic/siginfo.h>
/*
* Additional Tile-specific SIGILL si_codes
*/
#define ILL_DBLFLT (__SI_FAULT|9) /* double fault */
#define ILL_HARDWALL (__SI_FAULT|10) /* user networks hardwall violation */
#undef NSIGILL
#define NSIGILL 10
#endif /* _ASM_TILE_SIGINFO_H */

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _UAPI_ASM_TILE_SIGNAL_H
#define _UAPI_ASM_TILE_SIGNAL_H
/* Do not notify a ptracer when this signal is handled. */
#define SA_NOPTRACE 0x02000000u
/* Used in earlier Tilera releases, so keeping for binary compatibility. */
#define SA_RESTORER 0x04000000u
#include <asm-generic/signal.h>
#endif /* _UAPI_ASM_TILE_SIGNAL_H */

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#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
#define __ARCH_WANT_STAT64 /* Used for compat_sys_stat64() etc. */
#endif
#include <asm-generic/stat.h>

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef _ASM_TILE_SWAB_H
#define _ASM_TILE_SWAB_H
/* Tile gcc is always >= 4.3.0, so we use __builtin_bswap. */
#define __arch_swab32(x) __builtin_bswap32(x)
#define __arch_swab64(x) __builtin_bswap64(x)
#define __arch_swab16(x) (__builtin_bswap32(x) >> 16)
#endif /* _ASM_TILE_SWAB_H */

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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#if !defined(__LP64__) || defined(__SYSCALL_COMPAT)
/* Use the flavor of this syscall that matches the 32-bit API better. */
#define __ARCH_WANT_SYNC_FILE_RANGE2
#endif
/* Use the standard ABI for syscalls. */
#include <asm-generic/unistd.h>
/* Additional Tilera-specific syscalls. */
#define __NR_cacheflush (__NR_arch_specific_syscall + 1)
__SYSCALL(__NR_cacheflush, sys_cacheflush)
#ifndef __tilegx__
/* "Fast" syscalls provide atomic support for 32-bit chips. */
#define __NR_FAST_cmpxchg -1
#define __NR_FAST_atomic_update -2
#define __NR_FAST_cmpxchg64 -3
#define __NR_cmpxchg_badaddr (__NR_arch_specific_syscall + 0)
__SYSCALL(__NR_cmpxchg_badaddr, sys_cmpxchg_badaddr)
#endif