KVM: PPC: Make PV mtmsrd L=1 work with r30 and r31
We had an arbitrary limitation in mtmsrd L=1 that kept us from using r30 and r31 as input registers. Let's get rid of that and get more potential speedups! Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:

committed by
Avi Kivity

parent
9ee18b1e08
commit
df08bd1026
@@ -158,6 +158,7 @@ static u32 *kvm_alloc(int len)
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extern u32 kvm_emulate_mtmsrd_branch_offs;
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extern u32 kvm_emulate_mtmsrd_reg_offs;
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extern u32 kvm_emulate_mtmsrd_orig_ins_offs;
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extern u32 kvm_emulate_mtmsrd_len;
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extern u32 kvm_emulate_mtmsrd[];
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@@ -186,7 +187,21 @@ static void kvm_patch_ins_mtmsrd(u32 *inst, u32 rt)
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/* Modify the chunk to fit the invocation */
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memcpy(p, kvm_emulate_mtmsrd, kvm_emulate_mtmsrd_len * 4);
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p[kvm_emulate_mtmsrd_branch_offs] |= distance_end & KVM_INST_B_MASK;
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p[kvm_emulate_mtmsrd_reg_offs] |= rt;
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switch (get_rt(rt)) {
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case 30:
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kvm_patch_ins_ll(&p[kvm_emulate_mtmsrd_reg_offs],
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magic_var(scratch2), KVM_RT_30);
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break;
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case 31:
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kvm_patch_ins_ll(&p[kvm_emulate_mtmsrd_reg_offs],
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magic_var(scratch1), KVM_RT_30);
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break;
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default:
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p[kvm_emulate_mtmsrd_reg_offs] |= rt;
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break;
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}
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p[kvm_emulate_mtmsrd_orig_ins_offs] = *inst;
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flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtmsrd_len * 4);
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/* Patch the invocation */
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@@ -423,9 +438,7 @@ static void kvm_check_ins(u32 *inst, u32 features)
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/* Rewrites */
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case KVM_INST_MTMSRD_L1:
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/* We use r30 and r31 during the hook */
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if (get_rt(inst_rt) < 30)
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kvm_patch_ins_mtmsrd(inst, inst_rt);
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kvm_patch_ins_mtmsrd(inst, inst_rt);
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break;
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case KVM_INST_MTMSR:
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case KVM_INST_MTMSRD_L0:
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