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ASoC: max98090: Different comp tables for different pclks

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In addtion expand the table to handle other values of sysclk.  Instead
of making the table 3D, expand it to a more descriptive struct.  The
divisors are specified in Table 19 of the 98090 data sheet version
0p94.

The dmic frequency was previously assumed.  Instead make it explicit
and configurable through device tree.  This now handles independently
set pclk and dmic frequency.

Based on downstream work by Ralph Birt.

Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Dylan Reid
2014-11-03 10:28:57 -08:00
committed by Mark Brown
parent 33ebcd9b45
commit defcd98b16
3 changed files with 163 additions and 36 deletions
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8
sound/soc/codecs/max98090.h
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@@ -11,6 +11,12 @@
#ifndef _MAX98090_H
#define _MAX98090_H
/*
* The default operating frequency for a DMIC attached to the codec.
* This can be overridden by a device tree property.
*/
#define MAX98090_DEFAULT_DMIC_FREQ 2500000
/*
* MAX98090 Register Definitions
*/
@@ -1518,8 +1524,10 @@ struct max98090_priv {
struct max98090_pdata *pdata;
struct clk *mclk;
unsigned int sysclk;
unsigned int pclk;
unsigned int bclk;
unsigned int lrclk;
u32 dmic_freq;
struct max98090_cdata dai[1];
int jack_state;
struct delayed_work jack_work;