ARM: S3C2440: move mach-s3c2440/* into mach-s3c24xx/
This patch moves S3C2440 stuff into mach-s3c24xx/ directory so that we can merge the s3c24 series' directories to the just one mach-s3c24xx/ directory. And this patch is including following. - re-ordered alphabetically by option text at Kconfig and Makefile Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Kukjin Kim
226
arch/arm/mach-s3c24xx/mach-at2440evb.c
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226
arch/arm/mach-s3c24xx/mach-at2440evb.c
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/* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
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*
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* Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
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* Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
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* and modifications by SBZ <sbz@spgui.org> and
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* Weibing <http://weibing.blogbus.com>
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*
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* For product information, visit http://www.arm.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/serial_core.h>
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#include <linux/dm9000.h>
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#include <linux/platform_device.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <mach/fb.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <plat/regs-serial.h>
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#include <mach/regs-gpio.h>
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#include <mach/regs-mem.h>
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#include <mach/regs-lcd.h>
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#include <plat/nand.h>
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#include <plat/iic.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/partitions.h>
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#include <plat/clock.h>
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#include <plat/devs.h>
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#include <plat/cpu.h>
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#include <plat/mci.h>
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#include "common.h"
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static struct map_desc at2440evb_iodesc[] __initdata = {
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/* Nothing here */
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};
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#define UCON S3C2410_UCON_DEFAULT
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#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
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#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
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static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
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},
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};
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/* NAND Flash on AT2440EVB board */
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static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
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[0] = {
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.name = "Boot Agent",
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.size = SZ_256K,
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.offset = 0,
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},
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[1] = {
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.name = "Kernel",
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.size = SZ_2M,
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.offset = SZ_256K,
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},
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[2] = {
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.name = "Root",
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.offset = SZ_256K + SZ_2M,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
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[0] = {
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.name = "nand",
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.nr_chips = 1,
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.nr_partitions = ARRAY_SIZE(at2440evb_default_nand_part),
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.partitions = at2440evb_default_nand_part,
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},
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};
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static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
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.tacls = 25,
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.twrph0 = 55,
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.twrph1 = 40,
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.nr_sets = ARRAY_SIZE(at2440evb_nand_sets),
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.sets = at2440evb_nand_sets,
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};
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/* DM9000AEP 10/100 ethernet controller */
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static struct resource at2440evb_dm9k_resource[] = {
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[0] = {
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.start = S3C2410_CS3,
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.end = S3C2410_CS3 + 3,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = S3C2410_CS3 + 4,
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.end = S3C2410_CS3 + 7,
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.flags = IORESOURCE_MEM
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},
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[2] = {
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.start = IRQ_EINT7,
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.end = IRQ_EINT7,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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}
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};
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static struct dm9000_plat_data at2440evb_dm9k_pdata = {
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.flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
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};
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static struct platform_device at2440evb_device_eth = {
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.name = "dm9000",
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.id = -1,
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.num_resources = ARRAY_SIZE(at2440evb_dm9k_resource),
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.resource = at2440evb_dm9k_resource,
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.dev = {
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.platform_data = &at2440evb_dm9k_pdata,
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},
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};
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static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
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.gpio_detect = S3C2410_GPG(10),
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};
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/* 7" LCD panel */
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static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
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.lcdcon5 = S3C2410_LCDCON5_FRM565 |
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S3C2410_LCDCON5_INVVLINE |
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S3C2410_LCDCON5_INVVFRAME |
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S3C2410_LCDCON5_PWREN |
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S3C2410_LCDCON5_HWSWP,
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.type = S3C2410_LCDCON1_TFT,
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.width = 800,
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.height = 480,
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.pixclock = 33333, /* HCLK 60 MHz, divisor 2 */
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.xres = 800,
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.yres = 480,
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.bpp = 16,
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.left_margin = 88,
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.right_margin = 40,
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.hsync_len = 128,
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.upper_margin = 32,
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.lower_margin = 11,
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.vsync_len = 2,
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};
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static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
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.displays = &at2440evb_lcd_cfg,
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.num_displays = 1,
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.default_display = 0,
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};
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static struct platform_device *at2440evb_devices[] __initdata = {
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&s3c_device_ohci,
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&s3c_device_wdt,
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&s3c_device_adc,
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&s3c_device_i2c0,
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&s3c_device_rtc,
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&s3c_device_nand,
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&s3c_device_sdi,
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&s3c_device_lcd,
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&at2440evb_device_eth,
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};
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static void __init at2440evb_map_io(void)
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{
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s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
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s3c24xx_init_clocks(16934400);
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s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
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}
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static void __init at2440evb_init(void)
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{
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s3c24xx_fb_set_platdata(&at2440evb_fb_info);
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s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
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s3c_nand_set_platdata(&at2440evb_nand_info);
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s3c_i2c0_set_platdata(NULL);
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platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
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}
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MACHINE_START(AT2440EVB, "AT2440EVB")
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.atag_offset = 0x100,
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.map_io = at2440evb_map_io,
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.init_machine = at2440evb_init,
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.init_irq = s3c24xx_init_irq,
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.timer = &s3c24xx_timer,
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.restart = s3c2440_restart,
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MACHINE_END
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