spi: spidev: Add support for Dual/Quad SPI Transfers
Add support for Dual/Quad SPI Transfers to the spidev API. As this uses SPI mode bits that don't fit in a single byte, two new ioctls (SPI_IOC_RD_MODE32 and SPI_IOC_WR_MODE32) are introduced. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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Mark Brown

parent
e6456186ca
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dc64d39b54
@@ -42,6 +42,10 @@
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#define SPI_LOOP 0x20
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#define SPI_NO_CS 0x40
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#define SPI_READY 0x80
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#define SPI_TX_DUAL 0x100
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#define SPI_TX_QUAD 0x200
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#define SPI_RX_DUAL 0x400
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#define SPI_RX_QUAD 0x800
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/*---------------------------------------------------------------------------*/
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@@ -92,7 +96,9 @@ struct spi_ioc_transfer {
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__u16 delay_usecs;
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__u8 bits_per_word;
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__u8 cs_change;
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__u32 pad;
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__u8 tx_nbits;
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__u8 rx_nbits;
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__u16 pad;
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/* If the contents of 'struct spi_ioc_transfer' ever change
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* incompatibly, then the ioctl number (currently 0) must change;
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@@ -110,7 +116,7 @@ struct spi_ioc_transfer {
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#define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)])
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/* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) */
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/* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) (limited to 8 bits) */
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#define SPI_IOC_RD_MODE _IOR(SPI_IOC_MAGIC, 1, __u8)
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#define SPI_IOC_WR_MODE _IOW(SPI_IOC_MAGIC, 1, __u8)
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@@ -126,6 +132,10 @@ struct spi_ioc_transfer {
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#define SPI_IOC_RD_MAX_SPEED_HZ _IOR(SPI_IOC_MAGIC, 4, __u32)
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#define SPI_IOC_WR_MAX_SPEED_HZ _IOW(SPI_IOC_MAGIC, 4, __u32)
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/* Read / Write of the SPI mode field */
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#define SPI_IOC_RD_MODE32 _IOR(SPI_IOC_MAGIC, 5, __u32)
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#define SPI_IOC_WR_MODE32 _IOW(SPI_IOC_MAGIC, 5, __u32)
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#endif /* SPIDEV_H */
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