clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id
When submitted v2 of the G12A AO-CLK IDs, the SAR_ADC_SEL ID was moved
to the internal non-exported bindings, but this clock is necessary and
mandatory for the SAR ADC bindings.
Export it back to the public bindings.
Fixes: be3d960b0a ("dt-bindings: clk: add G12A AO Clock and Reset Bindings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190304105358.4987-1-narmstrong@baylibre.com
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@@ -16,7 +16,6 @@
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* to expose, such as the internal muxes and dividers of composite clocks,
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* to expose, such as the internal muxes and dividers of composite clocks,
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* will remain defined here.
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* will remain defined here.
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*/
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*/
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#define CLKID_AO_SAR_ADC_SEL 16
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#define CLKID_AO_SAR_ADC_DIV 17
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#define CLKID_AO_SAR_ADC_DIV 17
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#define CLKID_AO_CTS_OSCIN 19
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#define CLKID_AO_CTS_OSCIN 19
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#define CLKID_AO_32K_PRE 20
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#define CLKID_AO_32K_PRE 20
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@@ -26,6 +26,7 @@
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#define CLKID_AO_M4_FCLK 13
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#define CLKID_AO_M4_FCLK 13
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#define CLKID_AO_M4_HCLK 14
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#define CLKID_AO_M4_HCLK 14
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#define CLKID_AO_CLK81 15
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#define CLKID_AO_CLK81 15
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#define CLKID_AO_SAR_ADC_SEL 16
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#define CLKID_AO_SAR_ADC_CLK 18
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#define CLKID_AO_SAR_ADC_CLK 18
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#define CLKID_AO_32K 23
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#define CLKID_AO_32K 23
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#define CLKID_AO_CEC 27
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#define CLKID_AO_CEC 27
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