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octeontx2-af: Set proper errorcode for IPv4 checksum errors

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[ Upstream commit 1e4428b6dba9b683dc2ec0a56ed7879de3200cce ]

With current config, for packets with IPv4 checksum errors,
errorcode is being set to UNKNOWN. Hence added a separate
errorcodes for outer and inner IPv4 checksum and changed
NPC configuration accordingly.

Also turn on L2 multicast address check in NPC protocol check block.

Fixes: 6b3321bacc ("octeontx2-af: Enable packet length and csum validation")
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Sunil Goutham
2021-08-30 23:30:46 +05:30
committed by Greg Kroah-Hartman
parent bf2991f8e7
commit dc4ff31506
1 changed files with 4 additions and 3 deletions
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7
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
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@@ -1171,14 +1171,15 @@ int rvu_npc_init(struct rvu *rvu)
/* Enable below for Rx pkts. /* Enable below for Rx pkts.
* - Outer IPv4 header checksum validation. * - Outer IPv4 header checksum validation.
* - Detect outer L2 broadcast address and set NPC_RESULT_S[L2M]. * - Detect outer L2 broadcast address and set NPC_RESULT_S[L2B].
* - Detect outer L2 multicast address and set NPC_RESULT_S[L2M].
* - Inner IPv4 header checksum validation. * - Inner IPv4 header checksum validation.
* - Set non zero checksum error code value * - Set non zero checksum error code value
*/ */
rvu_write64(rvu, blkaddr, NPC_AF_PCK_CFG, rvu_write64(rvu, blkaddr, NPC_AF_PCK_CFG,
rvu_read64(rvu, blkaddr, NPC_AF_PCK_CFG) | rvu_read64(rvu, blkaddr, NPC_AF_PCK_CFG) |
BIT_ULL(32) | BIT_ULL(24) | BIT_ULL(6) | ((u64)NPC_EC_OIP4_CSUM << 32) | (NPC_EC_IIP4_CSUM << 24) |
BIT_ULL(2) | BIT_ULL(1)); BIT_ULL(7) | BIT_ULL(6) | BIT_ULL(2) | BIT_ULL(1));
/* Set RX and TX side MCAM search key size. /* Set RX and TX side MCAM search key size.
* LA..LD (ltype only) + Channel * LA..LD (ltype only) + Channel