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ARM: mm: introduce L_PTE_VALID for page table entries

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For long-descriptor translation table formats, the ARMv7 architecture
defines the last two bits of the second- and third-level descriptors to
be:

	x0b	- Invalid
	01b	- Block (second-level), Reserved (third-level)
	11b	- Table (second-level), Page (third-level)

This allows us to define L_PTE_PRESENT as (3 << 0) and use this value to
create ptes directly. However, when determining whether a given pte
value is present in the low-level page table accessors, we only need to
check the least significant bit of the descriptor, allowing us to write
faulting, present entries which are required for PROT_NONE mappings.

This patch introduces L_PTE_VALID, which can be used to test whether a
pte should fault, and updates the low-level page table accessors
accordingly.

Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Will Deacon
2012-07-19 11:51:05 +01:00
parent 0cbbbad631
commit dbf62d5006
5 changed files with 6 additions and 6 deletions
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2
arch/arm/mm/proc-v7-2level.S
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@@ -100,7 +100,7 @@ ENTRY(cpu_v7_set_pte_ext)
orrne r3, r3, #PTE_EXT_XN
tst r1, #L_PTE_YOUNG
tstne r1, #L_PTE_PRESENT
tstne r1, #L_PTE_VALID
moveq r3, #0
ARM( str r3, [r0, #2048]! )