staging:iio: Move DAC drivers out of staging
The IIO DAC drivers are in a reasonably good shape. They all make use of channel spec and non of them provides non-documented sysfs attributes. Code style should be OK as well, both checkpatch and coccicheck only report trivial issues. So lets move the whole folder out of staging. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Lars-Peter Clausen
committed by
Greg Kroah-Hartman
Greg Kroah-Hartman
parent
20374d1a36
commit
dbdc025bb2
418
drivers/iio/dac/ad5686.c
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418
drivers/iio/dac/ad5686.c
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@@ -0,0 +1,418 @@
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/*
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* AD5686R, AD5685R, AD5684R Digital to analog converters driver
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*
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* Copyright 2011 Analog Devices Inc.
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/interrupt.h>
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#include <linux/fs.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/spi/spi.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/regulator/consumer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#define AD5686_DAC_CHANNELS 4
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#define AD5686_ADDR(x) ((x) << 16)
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#define AD5686_CMD(x) ((x) << 20)
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#define AD5686_ADDR_DAC(chan) (0x1 << (chan))
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#define AD5686_ADDR_ALL_DAC 0xF
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#define AD5686_CMD_NOOP 0x0
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#define AD5686_CMD_WRITE_INPUT_N 0x1
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#define AD5686_CMD_UPDATE_DAC_N 0x2
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#define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3
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#define AD5686_CMD_POWERDOWN_DAC 0x4
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#define AD5686_CMD_LDAC_MASK 0x5
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#define AD5686_CMD_RESET 0x6
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#define AD5686_CMD_INTERNAL_REFER_SETUP 0x7
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#define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8
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#define AD5686_CMD_READBACK_ENABLE 0x9
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#define AD5686_LDAC_PWRDN_NONE 0x0
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#define AD5686_LDAC_PWRDN_1K 0x1
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#define AD5686_LDAC_PWRDN_100K 0x2
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#define AD5686_LDAC_PWRDN_3STATE 0x3
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/**
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* struct ad5686_chip_info - chip specific information
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* @int_vref_mv: AD5620/40/60: the internal reference voltage
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* @channel: channel specification
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*/
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struct ad5686_chip_info {
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u16 int_vref_mv;
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struct iio_chan_spec channel[AD5686_DAC_CHANNELS];
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};
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/**
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* struct ad5446_state - driver instance specific data
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* @spi: spi_device
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* @chip_info: chip model specific constants, available modes etc
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* @reg: supply regulator
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* @vref_mv: actual reference voltage used
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* @pwr_down_mask: power down mask
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* @pwr_down_mode: current power down mode
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* @data: spi transfer buffers
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*/
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struct ad5686_state {
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struct spi_device *spi;
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const struct ad5686_chip_info *chip_info;
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struct regulator *reg;
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unsigned short vref_mv;
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unsigned pwr_down_mask;
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unsigned pwr_down_mode;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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union {
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u32 d32;
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u8 d8[4];
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} data[3] ____cacheline_aligned;
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};
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/**
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* ad5686_supported_device_ids:
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*/
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enum ad5686_supported_device_ids {
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ID_AD5684,
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ID_AD5685,
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ID_AD5686,
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};
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static int ad5686_spi_write(struct ad5686_state *st,
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u8 cmd, u8 addr, u16 val, u8 shift)
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{
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val <<= shift;
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st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
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AD5686_ADDR(addr) |
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val);
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return spi_write(st->spi, &st->data[0].d8[1], 3);
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}
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static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
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{
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struct spi_transfer t[] = {
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{
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.tx_buf = &st->data[0].d8[1],
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.len = 3,
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.cs_change = 1,
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}, {
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.tx_buf = &st->data[1].d8[1],
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.rx_buf = &st->data[2].d8[1],
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.len = 3,
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},
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};
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struct spi_message m;
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int ret;
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spi_message_init(&m);
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spi_message_add_tail(&t[0], &m);
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spi_message_add_tail(&t[1], &m);
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st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
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AD5686_ADDR(addr));
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st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
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ret = spi_sync(st->spi, &m);
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if (ret < 0)
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return ret;
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return be32_to_cpu(st->data[2].d32);
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}
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static const char * const ad5686_powerdown_modes[] = {
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"1kohm_to_gnd",
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"100kohm_to_gnd",
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"three_state"
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};
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static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1;
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}
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static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, unsigned int mode)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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st->pwr_down_mode &= ~(0x3 << (chan->channel * 2));
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st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2));
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return 0;
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}
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static const struct iio_enum ad5686_powerdown_mode_enum = {
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.items = ad5686_powerdown_modes,
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.num_items = ARRAY_SIZE(ad5686_powerdown_modes),
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.get = ad5686_get_powerdown_mode,
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.set = ad5686_set_powerdown_mode,
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};
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static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private, const struct iio_chan_spec *chan, char *buf)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
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(0x3 << (chan->channel * 2))));
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}
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static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
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size_t len)
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{
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bool readin;
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int ret;
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struct ad5686_state *st = iio_priv(indio_dev);
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ret = strtobool(buf, &readin);
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if (ret)
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return ret;
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if (readin == true)
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st->pwr_down_mask |= (0x3 << (chan->channel * 2));
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else
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st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
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ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
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st->pwr_down_mask & st->pwr_down_mode, 0);
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return ret ? ret : len;
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}
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static int ad5686_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long m)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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unsigned long scale_uv;
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int ret;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&indio_dev->mlock);
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ret = ad5686_spi_read(st, chan->address);
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mutex_unlock(&indio_dev->mlock);
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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break;
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case IIO_CHAN_INFO_SCALE:
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scale_uv = (st->vref_mv * 100000)
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>> (chan->scan_type.realbits);
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*val = scale_uv / 100000;
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*val2 = (scale_uv % 100000) * 10;
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return IIO_VAL_INT_PLUS_MICRO;
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}
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return -EINVAL;
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}
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static int ad5686_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val,
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int val2,
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long mask)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (val > (1 << chan->scan_type.realbits) || val < 0)
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return -EINVAL;
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mutex_lock(&indio_dev->mlock);
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ret = ad5686_spi_write(st,
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AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
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chan->address,
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val,
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chan->scan_type.shift);
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mutex_unlock(&indio_dev->mlock);
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static const struct iio_info ad5686_info = {
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.read_raw = ad5686_read_raw,
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.write_raw = ad5686_write_raw,
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.driver_module = THIS_MODULE,
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};
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static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
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{
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.name = "powerdown",
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.read = ad5686_read_dac_powerdown,
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.write = ad5686_write_dac_powerdown,
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},
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IIO_ENUM("powerdown_mode", false, &ad5686_powerdown_mode_enum),
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IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum),
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{ },
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};
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#define AD5868_CHANNEL(chan, bits, shift) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.output = 1, \
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.channel = chan, \
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
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IIO_CHAN_INFO_SCALE_SHARED_BIT, \
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.address = AD5686_ADDR_DAC(chan), \
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.scan_type = IIO_ST('u', bits, 16, shift), \
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.ext_info = ad5686_ext_info, \
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}
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static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
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[ID_AD5684] = {
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.channel[0] = AD5868_CHANNEL(0, 12, 4),
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.channel[1] = AD5868_CHANNEL(1, 12, 4),
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.channel[2] = AD5868_CHANNEL(2, 12, 4),
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.channel[3] = AD5868_CHANNEL(3, 12, 4),
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.int_vref_mv = 2500,
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},
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[ID_AD5685] = {
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.channel[0] = AD5868_CHANNEL(0, 14, 2),
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.channel[1] = AD5868_CHANNEL(1, 14, 2),
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.channel[2] = AD5868_CHANNEL(2, 14, 2),
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.channel[3] = AD5868_CHANNEL(3, 14, 2),
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.int_vref_mv = 2500,
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},
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[ID_AD5686] = {
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.channel[0] = AD5868_CHANNEL(0, 16, 0),
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.channel[1] = AD5868_CHANNEL(1, 16, 0),
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.channel[2] = AD5868_CHANNEL(2, 16, 0),
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.channel[3] = AD5868_CHANNEL(3, 16, 0),
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.int_vref_mv = 2500,
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},
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};
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static int __devinit ad5686_probe(struct spi_device *spi)
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{
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struct ad5686_state *st;
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struct iio_dev *indio_dev;
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int ret, regdone = 0, voltage_uv = 0;
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indio_dev = iio_device_alloc(sizeof(*st));
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if (indio_dev == NULL)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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spi_set_drvdata(spi, indio_dev);
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st->reg = regulator_get(&spi->dev, "vcc");
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if (!IS_ERR(st->reg)) {
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ret = regulator_enable(st->reg);
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if (ret)
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goto error_put_reg;
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voltage_uv = regulator_get_voltage(st->reg);
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}
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st->chip_info =
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&ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data];
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if (voltage_uv)
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st->vref_mv = voltage_uv / 1000;
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else
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st->vref_mv = st->chip_info->int_vref_mv;
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st->spi = spi;
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/* Set all the power down mode for all channels to 1K pulldown */
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st->pwr_down_mode = 0x55;
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indio_dev->dev.parent = &spi->dev;
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->info = &ad5686_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = st->chip_info->channel;
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indio_dev->num_channels = AD5686_DAC_CHANNELS;
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regdone = 1;
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ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
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!!voltage_uv, 0);
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if (ret)
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goto error_disable_reg;
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ret = iio_device_register(indio_dev);
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if (ret)
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goto error_disable_reg;
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return 0;
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error_disable_reg:
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if (!IS_ERR(st->reg))
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regulator_disable(st->reg);
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error_put_reg:
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if (!IS_ERR(st->reg))
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regulator_put(st->reg);
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iio_device_free(indio_dev);
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return ret;
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}
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static int __devexit ad5686_remove(struct spi_device *spi)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(spi);
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struct ad5686_state *st = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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if (!IS_ERR(st->reg)) {
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regulator_disable(st->reg);
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regulator_put(st->reg);
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}
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iio_device_free(indio_dev);
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return 0;
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}
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static const struct spi_device_id ad5686_id[] = {
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{"ad5684", ID_AD5684},
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{"ad5685", ID_AD5685},
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{"ad5686", ID_AD5686},
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{}
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};
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MODULE_DEVICE_TABLE(spi, ad5686_id);
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static struct spi_driver ad5686_driver = {
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.driver = {
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.name = "ad5686",
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.owner = THIS_MODULE,
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},
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.probe = ad5686_probe,
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.remove = __devexit_p(ad5686_remove),
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.id_table = ad5686_id,
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};
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module_spi_driver(ad5686_driver);
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MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
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MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
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MODULE_LICENSE("GPL v2");
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