ARM: clk-imx6sl: refine clock tree for SSI

Each SSI has "ssi", "ssi_ipg" clocks, and they share same gate bits.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This commit is contained in:
Shengjiu Wang
2014-09-09 17:13:25 +08:00
committed by Shawn Guo
parent dc4805c2e7
commit dbaf381ffb
2 changed files with 14 additions and 4 deletions

View File

@@ -171,6 +171,9 @@
#define IMX6SL_PLL5_BYPASS 158
#define IMX6SL_PLL6_BYPASS 159
#define IMX6SL_PLL7_BYPASS 160
#define IMX6SL_CLK_END 161
#define IMX6SL_CLK_SSI1_IPG 161
#define IMX6SL_CLK_SSI2_IPG 162
#define IMX6SL_CLK_SSI3_IPG 163
#define IMX6SL_CLK_END 164
#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */