dmaengine: move HIGHMEM64G restriction to ASYNC_TX_DMA
On HIGHMEM64G systems dma_addr_t is known to be larger than (void *) which precludes async_xor from performing dma address conversions by reusing the input parameter address list. However, other parts of the dmaengine infrastructure do not suffer this constraint, so the HIGHMEM64G restriction can be down-levelled. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
此提交包含在:
@@ -4,7 +4,7 @@
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menuconfig DMADEVICES
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bool "DMA Engine support"
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depends on !HIGHMEM64G && HAS_DMA
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depends on HAS_DMA
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help
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DMA engines can do asynchronous data transfers without
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involving the host CPU. Currently, this framework can be
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@@ -100,7 +100,7 @@ config NET_DMA
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config ASYNC_TX_DMA
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bool "Async_tx: Offload support for the async_tx api"
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depends on DMA_ENGINE
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depends on DMA_ENGINE && !HIGHMEM64G
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help
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This allows the async_tx api to take advantage of offload engines for
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memcpy, memset, xor, and raid6 p+q operations. If your platform has
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