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EDAC, amd64_edac: Extend scrub rate support to F15hM60h

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The scrub rate control register has moved to function 2 in PCI config
space and is at a different offset on family 0x15, models 0x60 and
later. The minimum recommended scrub rate has also changed. (Refer to
D18F2x1c9_dct[1:0][DramScrub] in Fam15hM60h BKDG).

Adjust set_scrub_rate() and get_scrub_rate() functions to accommodate
this.

Tested on F15hM60h, Fam15h, models 00h-0fh and Fam10h systems.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1443440593-2316-2-git-send-email-Aravind.Gopalakrishnan@amd.com
[ Cleanup conditionals. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
This commit is contained in:
Aravind Gopalakrishnan
2015-09-28 06:43:12 -05:00
committed by Borislav Petkov
parent d0c9c93019
commit da92110dfd
2 changed files with 27 additions and 10 deletions
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2
drivers/edac/amd64_edac.h
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@@ -255,6 +255,8 @@
#define DCT_SEL_HI 0x114
#define F15H_M60H_SCRCTRL 0x1C8
/*
* Function 3 - Misc Control
*/