rtlwifi: rtl8192c: rtl8192ce: rtl8192cu: rtl8192se: rtl8192de: Shorten some variable names
The private data areas for these drivers contain some very long variable names that cause difficulty in fitting source lines to an 80-character limit. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:

committed by
John W. Linville

parent
0bd899e764
commit
da17fcffb1
@@ -43,8 +43,8 @@
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#define GET_UNDECORATED_AVERAGE_RSSI(_priv) \
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((RTLPRIV(_priv))->mac80211.opmode == \
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NL80211_IFTYPE_ADHOC) ? \
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((RTLPRIV(_priv))->dm.entry_min_undecoratedsmoothed_pwdb) : \
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((RTLPRIV(_priv))->dm.undecorated_smoothed_pwdb)
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((RTLPRIV(_priv))->dm.entry_min_undec_sm_pwdb) : \
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((RTLPRIV(_priv))->dm.undec_sm_pwdb)
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static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = {
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0x7f8001fe,
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@@ -167,18 +167,18 @@ static void rtl92c_dm_diginit(struct ieee80211_hw *hw)
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dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
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dm_digtable->cur_igvalue = 0x20;
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dm_digtable->pre_igvalue = 0x0;
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dm_digtable->cursta_connectstate = DIG_STA_DISCONNECT;
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dm_digtable->presta_connectstate = DIG_STA_DISCONNECT;
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dm_digtable->curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
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dm_digtable->cursta_cstate = DIG_STA_DISCONNECT;
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dm_digtable->presta_cstate = DIG_STA_DISCONNECT;
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dm_digtable->curmultista_cstate = DIG_MULTISTA_DISCONNECT;
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dm_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW;
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dm_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH;
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dm_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
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dm_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
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dm_digtable->rx_gain_range_max = DM_DIG_MAX;
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dm_digtable->rx_gain_range_min = DM_DIG_MIN;
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dm_digtable->backoff_val = DM_DIG_BACKOFF_DEFAULT;
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dm_digtable->backoff_val_range_max = DM_DIG_BACKOFF_MAX;
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dm_digtable->backoff_val_range_min = DM_DIG_BACKOFF_MIN;
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dm_digtable->back_val = DM_DIG_BACKOFF_DEFAULT;
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dm_digtable->back_range_max = DM_DIG_BACKOFF_MAX;
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dm_digtable->back_range_min = DM_DIG_BACKOFF_MIN;
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dm_digtable->pre_cck_pd_state = CCK_PD_STAGE_MAX;
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dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX;
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}
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@@ -189,22 +189,21 @@ static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)
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struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
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long rssi_val_min = 0;
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if ((dm_digtable->curmultista_connectstate == DIG_MULTISTA_CONNECT) &&
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(dm_digtable->cursta_connectstate == DIG_STA_CONNECT)) {
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if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0)
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if ((dm_digtable->curmultista_cstate == DIG_MULTISTA_CONNECT) &&
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(dm_digtable->cursta_cstate == DIG_STA_CONNECT)) {
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if (rtlpriv->dm.entry_min_undec_sm_pwdb != 0)
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rssi_val_min =
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(rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb >
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rtlpriv->dm.undecorated_smoothed_pwdb) ?
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rtlpriv->dm.undecorated_smoothed_pwdb :
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rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
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(rtlpriv->dm.entry_min_undec_sm_pwdb >
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rtlpriv->dm.undec_sm_pwdb) ?
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rtlpriv->dm.undec_sm_pwdb :
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rtlpriv->dm.entry_min_undec_sm_pwdb;
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else
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rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
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} else if (dm_digtable->cursta_connectstate == DIG_STA_CONNECT ||
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dm_digtable->cursta_connectstate == DIG_STA_BEFORE_CONNECT) {
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rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb;
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} else if (dm_digtable->curmultista_connectstate ==
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DIG_MULTISTA_CONNECT) {
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rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
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rssi_val_min = rtlpriv->dm.undec_sm_pwdb;
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} else if (dm_digtable->cursta_cstate == DIG_STA_CONNECT ||
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dm_digtable->cursta_cstate == DIG_STA_BEFORE_CONNECT) {
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rssi_val_min = rtlpriv->dm.undec_sm_pwdb;
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} else if (dm_digtable->curmultista_cstate == DIG_MULTISTA_CONNECT) {
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rssi_val_min = rtlpriv->dm.entry_min_undec_sm_pwdb;
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}
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return (u8) rssi_val_min;
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@@ -286,37 +285,33 @@ static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)
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static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
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struct dig_t *digtable = &rtlpriv->dm_digtable;
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if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable->fa_highthresh) {
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if ((dm_digtable->backoff_val - 2) <
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dm_digtable->backoff_val_range_min)
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dm_digtable->backoff_val =
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dm_digtable->backoff_val_range_min;
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if (rtlpriv->falsealm_cnt.cnt_all > digtable->fa_highthresh) {
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if ((digtable->back_val - 2) < digtable->back_range_min)
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digtable->back_val = digtable->back_range_min;
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else
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dm_digtable->backoff_val -= 2;
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} else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable->fa_lowthresh) {
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if ((dm_digtable->backoff_val + 2) >
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dm_digtable->backoff_val_range_max)
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dm_digtable->backoff_val =
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dm_digtable->backoff_val_range_max;
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digtable->back_val -= 2;
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} else if (rtlpriv->falsealm_cnt.cnt_all < digtable->fa_lowthresh) {
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if ((digtable->back_val + 2) > digtable->back_range_max)
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digtable->back_val = digtable->back_range_max;
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else
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dm_digtable->backoff_val += 2;
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digtable->back_val += 2;
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}
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if ((dm_digtable->rssi_val_min + 10 - dm_digtable->backoff_val) >
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dm_digtable->rx_gain_range_max)
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dm_digtable->cur_igvalue = dm_digtable->rx_gain_range_max;
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else if ((dm_digtable->rssi_val_min + 10 -
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dm_digtable->backoff_val) < dm_digtable->rx_gain_range_min)
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dm_digtable->cur_igvalue = dm_digtable->rx_gain_range_min;
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if ((digtable->rssi_val_min + 10 - digtable->back_val) >
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digtable->rx_gain_range_max)
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digtable->cur_igvalue = digtable->rx_gain_range_max;
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else if ((digtable->rssi_val_min + 10 -
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digtable->back_val) < digtable->rx_gain_range_min)
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digtable->cur_igvalue = digtable->rx_gain_range_min;
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else
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dm_digtable->cur_igvalue = dm_digtable->rssi_val_min + 10 -
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dm_digtable->backoff_val;
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digtable->cur_igvalue = digtable->rssi_val_min + 10 -
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digtable->back_val;
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RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
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"rssi_val_min = %x backoff_val %x\n",
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dm_digtable->rssi_val_min, dm_digtable->backoff_val);
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"rssi_val_min = %x back_val %x\n",
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digtable->rssi_val_min, digtable->back_val);
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rtl92c_dm_write_dig(hw);
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}
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@@ -327,14 +322,14 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
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struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
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long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
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long rssi_strength = rtlpriv->dm.entry_min_undec_sm_pwdb;
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bool multi_sta = false;
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if (mac->opmode == NL80211_IFTYPE_ADHOC)
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multi_sta = true;
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if (!multi_sta ||
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dm_digtable->cursta_connectstate != DIG_STA_DISCONNECT) {
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dm_digtable->cursta_cstate != DIG_STA_DISCONNECT) {
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initialized = false;
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dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
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return;
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@@ -345,7 +340,7 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
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rtl92c_dm_write_dig(hw);
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}
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if (dm_digtable->curmultista_connectstate == DIG_MULTISTA_CONNECT) {
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if (dm_digtable->curmultista_cstate == DIG_MULTISTA_CONNECT) {
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if ((rssi_strength < dm_digtable->rssi_lowthresh) &&
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(dm_digtable->dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {
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@@ -367,8 +362,8 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
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}
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RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
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"curmultista_connectstate = %x dig_ext_port_stage %x\n",
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dm_digtable->curmultista_connectstate,
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"curmultista_cstate = %x dig_ext_port_stage %x\n",
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dm_digtable->curmultista_cstate,
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dm_digtable->dig_ext_port_stage);
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}
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@@ -378,15 +373,14 @@ static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)
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struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
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RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
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"presta_connectstate = %x, cursta_connectstate = %x\n",
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dm_digtable->presta_connectstate,
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dm_digtable->cursta_connectstate);
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"presta_cstate = %x, cursta_cstate = %x\n",
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dm_digtable->presta_cstate, dm_digtable->cursta_cstate);
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if (dm_digtable->presta_connectstate == dm_digtable->cursta_connectstate
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|| dm_digtable->cursta_connectstate == DIG_STA_BEFORE_CONNECT
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|| dm_digtable->cursta_connectstate == DIG_STA_CONNECT) {
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if (dm_digtable->presta_cstate == dm_digtable->cursta_cstate ||
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dm_digtable->cursta_cstate == DIG_STA_BEFORE_CONNECT ||
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dm_digtable->cursta_cstate == DIG_STA_CONNECT) {
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if (dm_digtable->cursta_connectstate != DIG_STA_DISCONNECT) {
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if (dm_digtable->cursta_cstate != DIG_STA_DISCONNECT) {
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dm_digtable->rssi_val_min =
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rtl92c_dm_initial_gain_min_pwdb(hw);
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rtl92c_dm_ctrl_initgain_by_rssi(hw);
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@@ -394,7 +388,7 @@ static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)
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} else {
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dm_digtable->rssi_val_min = 0;
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dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
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dm_digtable->backoff_val = DM_DIG_BACKOFF_DEFAULT;
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dm_digtable->back_val = DM_DIG_BACKOFF_DEFAULT;
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dm_digtable->cur_igvalue = 0x20;
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dm_digtable->pre_igvalue = 0;
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rtl92c_dm_write_dig(hw);
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@@ -407,7 +401,7 @@ static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
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if (dm_digtable->cursta_connectstate == DIG_STA_CONNECT) {
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if (dm_digtable->cursta_cstate == DIG_STA_CONNECT) {
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dm_digtable->rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);
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if (dm_digtable->pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {
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@@ -484,15 +478,15 @@ static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw)
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return;
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if (mac->link_state >= MAC80211_LINKED)
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dm_digtable->cursta_connectstate = DIG_STA_CONNECT;
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dm_digtable->cursta_cstate = DIG_STA_CONNECT;
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else
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dm_digtable->cursta_connectstate = DIG_STA_DISCONNECT;
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dm_digtable->cursta_cstate = DIG_STA_DISCONNECT;
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rtl92c_dm_initial_gain_sta(hw);
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rtl92c_dm_initial_gain_multi_sta(hw);
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rtl92c_dm_cck_packet_detection_thresh(hw);
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dm_digtable->presta_connectstate = dm_digtable->cursta_connectstate;
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dm_digtable->presta_cstate = dm_digtable->cursta_cstate;
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}
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@@ -526,9 +520,9 @@ void rtl92c_dm_write_dig(struct ieee80211_hw *hw)
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struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
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RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
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"cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n",
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"cur_igvalue = 0x%x, pre_igvalue = 0x%x, back_val = %d\n",
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dm_digtable->cur_igvalue, dm_digtable->pre_igvalue,
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dm_digtable->backoff_val);
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dm_digtable->back_val);
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dm_digtable->cur_igvalue += 2;
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if (dm_digtable->cur_igvalue > 0x3f)
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@@ -555,20 +549,18 @@ static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw)
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return;
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if (tmpentry_max_pwdb != 0) {
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rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb =
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tmpentry_max_pwdb;
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rtlpriv->dm.entry_max_undec_sm_pwdb = tmpentry_max_pwdb;
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} else {
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rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0;
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rtlpriv->dm.entry_max_undec_sm_pwdb = 0;
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}
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if (tmpentry_min_pwdb != 0xff) {
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rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb =
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tmpentry_min_pwdb;
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rtlpriv->dm.entry_min_undec_sm_pwdb = tmpentry_min_pwdb;
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} else {
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rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0;
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rtlpriv->dm.entry_min_undec_sm_pwdb = 0;
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}
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h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF);
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h2c_parameter[2] = (u8) (rtlpriv->dm.undec_sm_pwdb & 0xFF);
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h2c_parameter[0] = 0;
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rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter);
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@@ -1160,7 +1152,7 @@ static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
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struct rate_adaptive *p_ra = &(rtlpriv->ra);
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u32 low_rssithresh_for_ra, high_rssithresh_for_ra;
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u32 low_rssi_thresh, high_rssi_thresh;
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struct ieee80211_sta *sta = NULL;
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if (is_hal_stop(rtlhal)) {
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@@ -1179,35 +1171,33 @@ static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)
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mac->opmode == NL80211_IFTYPE_STATION) {
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switch (p_ra->pre_ratr_state) {
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case DM_RATR_STA_HIGH:
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high_rssithresh_for_ra = 50;
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low_rssithresh_for_ra = 20;
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high_rssi_thresh = 50;
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low_rssi_thresh = 20;
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break;
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case DM_RATR_STA_MIDDLE:
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high_rssithresh_for_ra = 55;
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low_rssithresh_for_ra = 20;
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high_rssi_thresh = 55;
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low_rssi_thresh = 20;
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break;
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case DM_RATR_STA_LOW:
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high_rssithresh_for_ra = 50;
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low_rssithresh_for_ra = 25;
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high_rssi_thresh = 50;
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low_rssi_thresh = 25;
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break;
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default:
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high_rssithresh_for_ra = 50;
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low_rssithresh_for_ra = 20;
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high_rssi_thresh = 50;
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low_rssi_thresh = 20;
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break;
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}
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if (rtlpriv->dm.undecorated_smoothed_pwdb >
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(long)high_rssithresh_for_ra)
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if (rtlpriv->dm.undec_sm_pwdb > (long)high_rssi_thresh)
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p_ra->ratr_state = DM_RATR_STA_HIGH;
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else if (rtlpriv->dm.undecorated_smoothed_pwdb >
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(long)low_rssithresh_for_ra)
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else if (rtlpriv->dm.undec_sm_pwdb > (long)low_rssi_thresh)
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p_ra->ratr_state = DM_RATR_STA_MIDDLE;
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else
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p_ra->ratr_state = DM_RATR_STA_LOW;
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if (p_ra->pre_ratr_state != p_ra->ratr_state) {
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RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, "RSSI = %ld\n",
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rtlpriv->dm.undecorated_smoothed_pwdb);
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rtlpriv->dm.undec_sm_pwdb);
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RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
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"RSSI_LEVEL = %d\n", p_ra->ratr_state);
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RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
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@@ -1315,7 +1305,7 @@ static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)
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struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
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if (((mac->link_state == MAC80211_NOLINK)) &&
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(rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
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(rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) {
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dm_pstable->rssi_val_min = 0;
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RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, "Not connected to any\n");
|
||||
}
|
||||
@@ -1323,20 +1313,19 @@ static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)
|
||||
if (mac->link_state == MAC80211_LINKED) {
|
||||
if (mac->opmode == NL80211_IFTYPE_ADHOC) {
|
||||
dm_pstable->rssi_val_min =
|
||||
rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
|
||||
rtlpriv->dm.entry_min_undec_sm_pwdb;
|
||||
RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
|
||||
"AP Client PWDB = 0x%lx\n",
|
||||
dm_pstable->rssi_val_min);
|
||||
} else {
|
||||
dm_pstable->rssi_val_min =
|
||||
rtlpriv->dm.undecorated_smoothed_pwdb;
|
||||
dm_pstable->rssi_val_min = rtlpriv->dm.undec_sm_pwdb;
|
||||
RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
|
||||
"STA Default Port PWDB = 0x%lx\n",
|
||||
dm_pstable->rssi_val_min);
|
||||
}
|
||||
} else {
|
||||
dm_pstable->rssi_val_min =
|
||||
rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
|
||||
rtlpriv->dm.entry_min_undec_sm_pwdb;
|
||||
|
||||
RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,
|
||||
"AP Ext Port PWDB = 0x%lx\n",
|
||||
@@ -1368,7 +1357,7 @@ void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_phy *rtlphy = &(rtlpriv->phy);
|
||||
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
|
||||
long undecorated_smoothed_pwdb;
|
||||
long undec_sm_pwdb;
|
||||
|
||||
if (!rtlpriv->dm.dynamic_txpower_enable)
|
||||
return;
|
||||
@@ -1379,7 +1368,7 @@ void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
|
||||
}
|
||||
|
||||
if ((mac->link_state < MAC80211_LINKED) &&
|
||||
(rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) {
|
||||
(rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) {
|
||||
RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
|
||||
"Not connected to any\n");
|
||||
|
||||
@@ -1391,41 +1380,35 @@ void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw)
|
||||
|
||||
if (mac->link_state >= MAC80211_LINKED) {
|
||||
if (mac->opmode == NL80211_IFTYPE_ADHOC) {
|
||||
undecorated_smoothed_pwdb =
|
||||
rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
|
||||
undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
|
||||
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
|
||||
"AP Client PWDB = 0x%lx\n",
|
||||
undecorated_smoothed_pwdb);
|
||||
undec_sm_pwdb);
|
||||
} else {
|
||||
undecorated_smoothed_pwdb =
|
||||
rtlpriv->dm.undecorated_smoothed_pwdb;
|
||||
undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb;
|
||||
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
|
||||
"STA Default Port PWDB = 0x%lx\n",
|
||||
undecorated_smoothed_pwdb);
|
||||
undec_sm_pwdb);
|
||||
}
|
||||
} else {
|
||||
undecorated_smoothed_pwdb =
|
||||
rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
|
||||
undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
|
||||
|
||||
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
|
||||
"AP Ext Port PWDB = 0x%lx\n",
|
||||
undecorated_smoothed_pwdb);
|
||||
undec_sm_pwdb);
|
||||
}
|
||||
|
||||
if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
|
||||
if (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
|
||||
rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
|
||||
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
|
||||
"TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
|
||||
} else if ((undecorated_smoothed_pwdb <
|
||||
(TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
|
||||
(undecorated_smoothed_pwdb >=
|
||||
TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
|
||||
} else if ((undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
|
||||
(undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
|
||||
|
||||
rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
|
||||
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
|
||||
"TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
|
||||
} else if (undecorated_smoothed_pwdb <
|
||||
(TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
|
||||
} else if (undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
|
||||
rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
|
||||
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
|
||||
"TXHIGHPWRLEVEL_NORMAL\n");
|
||||
@@ -1473,48 +1456,46 @@ u8 rtl92c_bt_rssi_state_change(struct ieee80211_hw *hw)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw);
|
||||
long undecorated_smoothed_pwdb;
|
||||
long undec_sm_pwdb;
|
||||
u8 curr_bt_rssi_state = 0x00;
|
||||
|
||||
if (rtlpriv->mac80211.link_state == MAC80211_LINKED) {
|
||||
undecorated_smoothed_pwdb =
|
||||
GET_UNDECORATED_AVERAGE_RSSI(rtlpriv);
|
||||
undec_sm_pwdb = GET_UNDECORATED_AVERAGE_RSSI(rtlpriv);
|
||||
} else {
|
||||
if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)
|
||||
undecorated_smoothed_pwdb = 100;
|
||||
if (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)
|
||||
undec_sm_pwdb = 100;
|
||||
else
|
||||
undecorated_smoothed_pwdb =
|
||||
rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb;
|
||||
undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
|
||||
}
|
||||
|
||||
/* Check RSSI to determine HighPower/NormalPower state for
|
||||
* BT coexistence. */
|
||||
if (undecorated_smoothed_pwdb >= 67)
|
||||
if (undec_sm_pwdb >= 67)
|
||||
curr_bt_rssi_state &= (~BT_RSSI_STATE_NORMAL_POWER);
|
||||
else if (undecorated_smoothed_pwdb < 62)
|
||||
else if (undec_sm_pwdb < 62)
|
||||
curr_bt_rssi_state |= BT_RSSI_STATE_NORMAL_POWER;
|
||||
|
||||
/* Check RSSI to determine AMPDU setting for BT coexistence. */
|
||||
if (undecorated_smoothed_pwdb >= 40)
|
||||
if (undec_sm_pwdb >= 40)
|
||||
curr_bt_rssi_state &= (~BT_RSSI_STATE_AMDPU_OFF);
|
||||
else if (undecorated_smoothed_pwdb <= 32)
|
||||
else if (undec_sm_pwdb <= 32)
|
||||
curr_bt_rssi_state |= BT_RSSI_STATE_AMDPU_OFF;
|
||||
|
||||
/* Marked RSSI state. It will be used to determine BT coexistence
|
||||
* setting later. */
|
||||
if (undecorated_smoothed_pwdb < 35)
|
||||
if (undec_sm_pwdb < 35)
|
||||
curr_bt_rssi_state |= BT_RSSI_STATE_SPECIAL_LOW;
|
||||
else
|
||||
curr_bt_rssi_state &= (~BT_RSSI_STATE_SPECIAL_LOW);
|
||||
|
||||
/* Set Tx Power according to BT status. */
|
||||
if (undecorated_smoothed_pwdb >= 30)
|
||||
if (undec_sm_pwdb >= 30)
|
||||
curr_bt_rssi_state |= BT_RSSI_STATE_TXPOWER_LOW;
|
||||
else if (undecorated_smoothed_pwdb < 25)
|
||||
else if (undec_sm_pwdb < 25)
|
||||
curr_bt_rssi_state &= (~BT_RSSI_STATE_TXPOWER_LOW);
|
||||
|
||||
/* Check BT state related to BT_Idle in B/G mode. */
|
||||
if (undecorated_smoothed_pwdb < 15)
|
||||
if (undec_sm_pwdb < 15)
|
||||
curr_bt_rssi_state |= BT_RSSI_STATE_BG_EDCA_LOW;
|
||||
else
|
||||
curr_bt_rssi_state &= (~BT_RSSI_STATE_BG_EDCA_LOW);
|
||||
|
@@ -34,9 +34,6 @@
|
||||
#include "dm_common.h"
|
||||
#include "phy_common.h"
|
||||
|
||||
/* Define macro to shorten lines */
|
||||
#define MCS_TXPWR mcs_txpwrlevel_origoffset
|
||||
|
||||
u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
@@ -138,13 +135,13 @@ u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw,
|
||||
rfpi_enable = (u8) rtl_get_bbreg(hw, RFPGA0_XB_HSSIPARAMETER1,
|
||||
BIT(8));
|
||||
if (rfpi_enable)
|
||||
retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readbackpi,
|
||||
retvalue = rtl_get_bbreg(hw, pphyreg->rf_rbpi,
|
||||
BLSSIREADBACKDATA);
|
||||
else
|
||||
retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readback,
|
||||
retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb,
|
||||
BLSSIREADBACKDATA);
|
||||
RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x]=0x%x\n",
|
||||
rfpath, pphyreg->rflssi_readback, retvalue);
|
||||
rfpath, pphyreg->rf_rb, retvalue);
|
||||
return retvalue;
|
||||
}
|
||||
EXPORT_SYMBOL(_rtl92c_phy_rf_serial_read);
|
||||
@@ -290,11 +287,11 @@ void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
|
||||
else
|
||||
return;
|
||||
|
||||
rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][index] = data;
|
||||
rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index] = data;
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
|
||||
"MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n",
|
||||
rtlphy->pwrgroup_cnt, index,
|
||||
rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][index]);
|
||||
rtlphy->mcs_offset[rtlphy->pwrgroup_cnt][index]);
|
||||
|
||||
if (index == 13)
|
||||
rtlphy->pwrgroup_cnt++;
|
||||
@@ -374,14 +371,10 @@ void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw)
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RFPGA0_XA_HSSIPARAMETER2;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RFPGA0_XB_HSSIPARAMETER2;
|
||||
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rfswitch_control =
|
||||
RFPGA0_XAB_SWITCHCONTROL;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rfswitch_control =
|
||||
RFPGA0_XAB_SWITCHCONTROL;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rfswitch_control =
|
||||
RFPGA0_XCD_SWITCHCONTROL;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rfswitch_control =
|
||||
RFPGA0_XCD_SWITCHCONTROL;
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL;
|
||||
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rfagc_control1 = ROFDM0_XAAGCCORE1;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rfagc_control1 = ROFDM0_XBAGCCORE1;
|
||||
@@ -393,47 +386,33 @@ void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw)
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2;
|
||||
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbalance =
|
||||
ROFDM0_XARXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbalance =
|
||||
ROFDM0_XBRXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbalance =
|
||||
ROFDM0_XCRXIQIMBANLANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbalance =
|
||||
ROFDM0_XDRXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rfrxiq_imbal = ROFDM0_XARXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rfrxiq_imbal = ROFDM0_XBRXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbal = ROFDM0_XCRXIQIMBANLANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbal = ROFDM0_XDRXIQIMBALANCE;
|
||||
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE;
|
||||
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbalance =
|
||||
ROFDM0_XATXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbalance =
|
||||
ROFDM0_XBTXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbalance =
|
||||
ROFDM0_XCTXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbalance =
|
||||
ROFDM0_XDTXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rftxiq_imbal = ROFDM0_XATXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rftxiq_imbal = ROFDM0_XBTXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbal = ROFDM0_XCTXIQIMBALANCE;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbal = ROFDM0_XDTXIQIMBALANCE;
|
||||
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rftx_afe = ROFDM0_XBTXAFE;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rftx_afe = ROFDM0_XCTXAFE;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rftx_afe = ROFDM0_XDTXAFE;
|
||||
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rflssi_readback =
|
||||
RFPGA0_XA_LSSIREADBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rflssi_readback =
|
||||
RFPGA0_XB_LSSIREADBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rflssi_readback =
|
||||
RFPGA0_XC_LSSIREADBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rflssi_readback =
|
||||
RFPGA0_XD_LSSIREADBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rf_rb = RFPGA0_XA_LSSIREADBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rf_rb = RFPGA0_XB_LSSIREADBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_C].rf_rb = RFPGA0_XC_LSSIREADBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_D].rf_rb = RFPGA0_XD_LSSIREADBACK;
|
||||
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rflssi_readbackpi =
|
||||
TRANSCEIVEA_HSPI_READBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rflssi_readbackpi =
|
||||
TRANSCEIVEB_HSPI_READBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_A].rf_rbpi = TRANSCEIVEA_HSPI_READBACK;
|
||||
rtlphy->phyreg_def[RF90_PATH_B].rf_rbpi = TRANSCEIVEB_HSPI_READBACK;
|
||||
|
||||
}
|
||||
EXPORT_SYMBOL(_rtl92c_phy_init_bb_rf_register_definition);
|
||||
|
Reference in New Issue
Block a user