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x86/numachip: Add Numachip2 APIC support

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Introduce support for Numachip2 remote interrupts via detecting the right
ACPI SRAT signature.

Access is performed via a fixed mapping in the x86 physical address space.

Signed-off-by: Daniel J Blueman <daniel@numascale.com>
Acked-by: Steffen Persvold <sp@numascale.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: http://lkml.kernel.org/r/1442768522-19217-2-git-send-email-daniel@numascale.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Daniel J Blueman
2015-09-21 01:02:00 +08:00
committed by Thomas Gleixner
parent db1003a719
commit d9d4dee6ce
3 changed files with 129 additions and 0 deletions
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1
arch/x86/include/asm/numachip/numachip.h
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@@ -14,6 +14,7 @@
#ifndef _ASM_X86_NUMACHIP_NUMACHIP_H
#define _ASM_X86_NUMACHIP_NUMACHIP_H
extern u8 numachip_system;
extern int __init pci_numachip_init(void);
#endif /* _ASM_X86_NUMACHIP_NUMACHIP_H */

35
arch/x86/include/asm/numachip/numachip_csr.h
View File

@@ -14,6 +14,7 @@
#ifndef _ASM_X86_NUMACHIP_NUMACHIP_CSR_H
#define _ASM_X86_NUMACHIP_NUMACHIP_CSR_H
#include <linux/smp.h>
#include <linux/io.h>
#define CSR_NODE_SHIFT 16
@@ -50,4 +51,38 @@ static inline void write_lcsr(unsigned long offset, unsigned int val)
writel(swab32(val), lcsr_address(offset));
}
/*
* On NumaChip2, local CSR space is 16MB and starts at fixed offset below 4G
*/
#define NUMACHIP2_LCSR_BASE 0xf0000000UL
#define NUMACHIP2_LCSR_SIZE 0x1000000UL
#define NUMACHIP2_APIC_ICR 0x100000
static inline void __iomem *numachip2_lcsr_address(unsigned long offset)
{
return (void __iomem *)__va(NUMACHIP2_LCSR_BASE |
(offset & (NUMACHIP2_LCSR_SIZE - 1)));
}
static inline u32 numachip2_read32_lcsr(unsigned long offset)
{
return readl(numachip2_lcsr_address(offset));
}
static inline u64 numachip2_read64_lcsr(unsigned long offset)
{
return readq(numachip2_lcsr_address(offset));
}
static inline void numachip2_write32_lcsr(unsigned long offset, u32 val)
{
writel(val, numachip2_lcsr_address(offset));
}
static inline void numachip2_write64_lcsr(unsigned long offset, u64 val)
{
writeq(val, numachip2_lcsr_address(offset));
}
#endif /* _ASM_X86_NUMACHIP_NUMACHIP_CSR_H */