pinctrl: mediatek: Add EINT support to MTK pinctrl driver.
MTK SoC support external interrupt(EINT) from most SoC pins. Add EINT support to pinctrl driver. Signed-off-by: Maoguang Meng <maoguang.meng@mediatek.com> Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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committed by
Linus Walleij

parent
a6df410d42
commit
d9819eb9cd
@@ -16,10 +16,16 @@
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#define __PINCTRL_MTK_COMMON_H
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/spinlock.h>
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#include <linux/regmap.h>
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#define NO_EINT_SUPPORT 255
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#define MTK_CHIP_TYPE_BASE 0
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#define MTK_CHIP_TYPE_PMIC 1
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#define MT_EDGE_SENSITIVE 0
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#define MT_LEVEL_SENSITIVE 1
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#define EINT_DBNC_SET_DBNC_BITS 4
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#define EINT_DBNC_RST_BIT (0x1 << 1)
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#define EINT_DBNC_SET_EN (0x1 << 0)
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struct mtk_desc_function {
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const char *name;
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@@ -115,6 +121,27 @@ struct mtk_pin_drv_grp {
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.grp = _grp, \
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}
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struct mtk_eint_offsets {
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const char *name;
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unsigned int stat;
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unsigned int ack;
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unsigned int mask;
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unsigned int mask_set;
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unsigned int mask_clr;
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unsigned int sens;
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unsigned int sens_set;
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unsigned int sens_clr;
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unsigned int pol;
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unsigned int pol_set;
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unsigned int pol_clr;
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unsigned int dom_en;
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unsigned int dbnc_ctrl;
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unsigned int dbnc_set;
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unsigned int dbnc_clr;
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u8 port_mask;
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u8 ports;
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};
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/**
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* struct mtk_pinctrl_devdata - Provide HW GPIO related data.
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* @pins: An array describing all pins the pin controller affects.
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@@ -165,6 +192,10 @@ struct mtk_pinctrl_devdata {
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unsigned char port_shf;
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unsigned char port_mask;
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unsigned char port_align;
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unsigned char chip_type;
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struct mtk_eint_offsets eint_offsets;
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unsigned int ap_num;
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unsigned int db_cnt;
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};
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struct mtk_pinctrl {
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@@ -177,6 +208,8 @@ struct mtk_pinctrl {
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const char **grp_names;
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struct pinctrl_dev *pctl_dev;
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const struct mtk_pinctrl_devdata *devdata;
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void __iomem *eint_reg_base;
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struct irq_domain *domain;
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};
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int mtk_pctrl_init(struct platform_device *pdev,
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