dmaengine: dw: define DW_DMA_MAX_NR_MASTERS
Instead of using magic number in the code the patch provides DW_DMA_MAX_NR_MASTERS constant. While here, restrict the reading of data width array by amount of the actual number of AHB masters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Vinod Koul

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@@ -112,7 +112,7 @@
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chan_allocation_order = <0>;
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chan_priority = <1>;
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block_size = <0x7ff>;
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data_width = <2 0 0 0>;
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data_width = <2>;
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clocks = <&ahb_clk>;
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clock-names = "hclk";
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};
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