Merge tag 'rproc-v4.14' of git://github.com/andersson/remoteproc
Pull remoteproc updates from Bjorn Andersson: "This adds and improves remoteproc support for TI DA8xx/OMAP-L13x DSP, TI Keystone 66AK2G DSP and iMX6SX/7D Cortex M4 coprocessors. It introduces the Qualcomm restart notifier and a few fixes" * tag 'rproc-v4.14' of git://github.com/andersson/remoteproc: remoteproc: Introduce rproc handle accessor for children remoteproc: qcom: Make ssr_notifiers local remoteproc: Stop subdevices in reverse order remoteproc: imx_rproc: add a NXP/Freescale imx_rproc driver remoteproc: dt: Provide bindings for iMX6SX/7D Remote Processor Controller driver remoteproc: qcom: Use PTR_ERR_OR_ZERO remoteproc: st: explicitly request exclusive reset control remoteproc: qcom: explicitly request exclusive reset control remoteproc/keystone: explicitly request exclusive reset control remoteproc/keystone: Add support for Keystone 66AK2G SOCs remoteproc/davinci: Add device tree support for OMAP-L138 DSP dt-bindings: remoteproc: Add bindings for Davinci DSP processors remoteproc/davinci: Add support to parse internal memories remoteproc/davinci: Switch to platform_get_resource_byname() remoteproc: make device_type const soc: qcom: GLINK SSR notifier remoteproc: qcom: Add support for SSR notifications remoteproc: Merge __rproc_boot() with rproc_boot()
This commit is contained in:
Linus Torvalds
33
Documentation/devicetree/bindings/remoteproc/imx-rproc.txt
Normal file
33
Documentation/devicetree/bindings/remoteproc/imx-rproc.txt
Normal file
@@ -0,0 +1,33 @@
|
||||
NXP iMX6SX/iMX7D Co-Processor Bindings
|
||||
----------------------------------------
|
||||
|
||||
This binding provides support for ARM Cortex M4 Co-processor found on some
|
||||
NXP iMX SoCs.
|
||||
|
||||
Required properties:
|
||||
- compatible Should be one of:
|
||||
"fsl,imx7d-cm4"
|
||||
"fsl,imx6sx-cm4"
|
||||
- clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
|
||||
- syscon Phandle to syscon block which provide access to
|
||||
System Reset Controller
|
||||
|
||||
Optional properties:
|
||||
- memory-region list of phandels to the reserved memory regions.
|
||||
(See: ../reserved-memory/reserved-memory.txt)
|
||||
|
||||
Example:
|
||||
m4_reserved_sysmem1: cm4@80000000 {
|
||||
reg = <0x80000000 0x80000>;
|
||||
};
|
||||
|
||||
m4_reserved_sysmem2: cm4@81000000 {
|
||||
reg = <0x81000000 0x80000>;
|
||||
};
|
||||
|
||||
imx7d-cm4 {
|
||||
compatible = "fsl,imx7d-cm4";
|
||||
memory-region = <&m4_reserved_sysmem1>, <&m4_reserved_sysmem2>;
|
||||
syscon = <&src>;
|
||||
clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>;
|
||||
};
|
||||
@@ -0,0 +1,86 @@
|
||||
TI Davinci DSP devices
|
||||
=======================
|
||||
|
||||
Binding status: Unstable - Subject to changes for DT representation of clocks
|
||||
and resets
|
||||
|
||||
The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
|
||||
is used to offload some of the processor-intensive tasks or algorithms, for
|
||||
achieving various system level goals.
|
||||
|
||||
The processor cores in the sub-system usually contain additional sub-modules
|
||||
like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
|
||||
controller, a dedicated local power/sleep controller etc. The DSP processor
|
||||
core used in Davinci SoCs is usually a C674x DSP CPU.
|
||||
|
||||
DSP Device Node:
|
||||
================
|
||||
Each DSP Core sub-system is represented as a single DT node.
|
||||
|
||||
Required properties:
|
||||
--------------------
|
||||
The following are the mandatory properties:
|
||||
|
||||
- compatible: Should be one of the following,
|
||||
"ti,da850-dsp" for DSPs on OMAP-L138 SoCs
|
||||
|
||||
- reg: Should contain an entry for each value in 'reg-names'.
|
||||
Each entry should have the memory region's start address
|
||||
and the size of the region, the representation matching
|
||||
the parent node's '#address-cells' and '#size-cells' values.
|
||||
|
||||
- reg-names: Should contain strings with the following names, each
|
||||
representing a specific internal memory region or a
|
||||
specific register space,
|
||||
"l2sram", "l1pram", "l1dram", "host1cfg", "chipsig_base"
|
||||
|
||||
- interrupts: Should contain the interrupt number used to receive the
|
||||
interrupts from the DSP. The value should follow the
|
||||
interrupt-specifier format as dictated by the
|
||||
'interrupt-parent' node.
|
||||
|
||||
- memory-region: phandle to the reserved memory node to be associated
|
||||
with the remoteproc device. The reserved memory node
|
||||
can be a CMA memory node, and should be defined as
|
||||
per the bindings in
|
||||
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
|
||||
|
||||
Optional properties:
|
||||
--------------------
|
||||
- interrupt-parent: phandle to the interrupt controller node. This property
|
||||
is needed if the device node hierarchy doesn't have an
|
||||
interrupt controller.
|
||||
|
||||
|
||||
Example:
|
||||
--------
|
||||
|
||||
/* DSP Reserved Memory node */
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
dsp_memory_region: dsp-memory@c3000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0xc3000000 0x1000000>;
|
||||
reusable;
|
||||
};
|
||||
};
|
||||
|
||||
/* DSP node */
|
||||
{
|
||||
dsp: dsp@11800000 {
|
||||
compatible = "ti,da850-dsp";
|
||||
reg = <0x11800000 0x40000>,
|
||||
<0x11e00000 0x8000>,
|
||||
<0x11f00000 0x8000>,
|
||||
<0x01c14044 0x4>,
|
||||
<0x01c14174 0x8>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram", "host1cfg",
|
||||
"chipsig";
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <28>;
|
||||
memory-region = <&dsp_memory_region>;
|
||||
};
|
||||
};
|
||||
@@ -26,6 +26,7 @@ The following are the mandatory properties:
|
||||
"ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
|
||||
"ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
|
||||
"ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
|
||||
"ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
|
||||
|
||||
- reg: Should contain an entry for each value in 'reg-names'.
|
||||
Each entry should have the memory region's start address
|
||||
@@ -37,20 +38,18 @@ The following are the mandatory properties:
|
||||
should be defined in this order,
|
||||
"l2sram", "l1pram", "l1dram"
|
||||
|
||||
- clocks: Should contain the device's input clock, and should be
|
||||
defined as per the bindings in,
|
||||
Documentation/devicetree/bindings/clock/keystone-gate.txt
|
||||
|
||||
- ti,syscon-dev: Should be a pair of the phandle to the Keystone Device
|
||||
State Control node, and the register offset of the DSP
|
||||
boot address register within that node's address space.
|
||||
|
||||
- resets: Should contain the phandle to the reset controller node
|
||||
managing the resets for this device, and a reset
|
||||
specifier. Please refer to the following reset bindings
|
||||
for the reset argument specifier as per SoC,
|
||||
specifier. Please refer to either of the following reset
|
||||
bindings for the reset argument specifier as per SoC,
|
||||
Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
|
||||
for 66AK2HK/66AK2L/66AK2E SoCs
|
||||
for 66AK2HK/66AK2L/66AK2E SoCs or,
|
||||
Documentation/devicetree/bindings/reset/ti,sci-reset.txt
|
||||
for 66AK2G SoCs
|
||||
|
||||
- interrupt-parent: Should contain a phandle to the Keystone 2 IRQ controller
|
||||
IP node that is used by the ARM CorePac processor to
|
||||
@@ -75,6 +74,22 @@ The following are the mandatory properties:
|
||||
The gpio device to be used is as per the bindings in,
|
||||
Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt
|
||||
|
||||
SoC-specific Required properties:
|
||||
---------------------------------
|
||||
The following are mandatory properties for Keystone 2 66AK2HK, 66AK2L and 66AK2E
|
||||
SoCs only:
|
||||
|
||||
- clocks: Should contain the device's input clock, and should be
|
||||
defined as per the bindings in,
|
||||
Documentation/devicetree/bindings/clock/keystone-gate.txt
|
||||
|
||||
The following are mandatory properties for Keystone 2 66AK2G SoCs only:
|
||||
|
||||
- power-domains: Should contain a phandle to a PM domain provider node
|
||||
and an args specifier containing the DSP device id
|
||||
value. This property is as per the binding,
|
||||
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
|
||||
|
||||
Optional properties:
|
||||
--------------------
|
||||
|
||||
@@ -85,8 +100,10 @@ Optional properties:
|
||||
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
|
||||
|
||||
|
||||
Example:
|
||||
--------
|
||||
Examples:
|
||||
---------
|
||||
|
||||
1.
|
||||
/* 66AK2H/K DSP aliases */
|
||||
aliases {
|
||||
rproc0 = &dsp0;
|
||||
@@ -131,3 +148,41 @@ Example:
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
2.
|
||||
/* 66AK2G DSP alias */
|
||||
aliases {
|
||||
rproc0 = &dsp0;
|
||||
};
|
||||
|
||||
/* 66AK2G DSP memory node */
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
dsp_common_memory: dsp-common-memory@81f800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
|
||||
reusable;
|
||||
};
|
||||
};
|
||||
|
||||
/* 66AK2G DSP node */
|
||||
soc {
|
||||
dsp0: dsp@10800000 {
|
||||
compatible = "ti,k2g-dsp";
|
||||
reg = <0x10800000 0x00100000>,
|
||||
<0x10e00000 0x00008000>,
|
||||
<0x10f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
power-domains = <&k2g_pds 0x0046>;
|
||||
ti,syscon-dev = <&devctrl 0x40>;
|
||||
resets = <&k2g_reset 0x0046 0x1>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <0 8>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio0 27 0>;
|
||||
memory-region = <&dsp_common_memory>;
|
||||
};
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user