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arm: socfpga: Add SMP support for actual socfpga harware

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Because the CPU1 start address is different for socfpga-vt and
socfpga-cyclone5, we add code to use the correct CPU1 start addr.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Pavel Machek <pavel@denx.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Dinh Nguyen
2013-02-11 17:30:33 -06:00
committed by Olof Johansson
parent c08e20d246
commit d6dd735f4b
7 changed files with 41 additions and 12 deletions
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17
arch/arm/mach-socfpga/platsmp.c
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@@ -47,16 +47,19 @@ static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct
{
int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
if (cpu1start_addr) {
memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
__raw_writel(virt_to_phys(secondary_startup), (sys_manager_base_addr+0x10));
__raw_writel(virt_to_phys(socfpga_secondary_startup),
(sys_manager_base_addr + (cpu1start_addr & 0x000000ff)));
flush_cache_all();
smp_wmb();
outer_clean_range(0, trampoline_size);
flush_cache_all();
smp_wmb();
outer_clean_range(0, trampoline_size);
/* This will release CPU #1 out of reset.*/
__raw_writel(0, rst_manager_base_addr + 0x10);
/* This will release CPU #1 out of reset.*/
__raw_writel(0, rst_manager_base_addr + 0x10);
}
return 0;
}