powerpc: BookE hardware watchpoint support
This patch implements support for HW based watchpoint via the DBSR_DAC (Data Address Compare) facility of the BookE processors. It does so by interfacing with the existing DABR breakpoint code and adding the necessary bits and pieces for the new bits to be properly set or cleared Signed-off-by: Luis Machado <luisgpm@br.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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committed by
Benjamin Herrenschmidt

parent
00bf6e9061
commit
d6a61bfc06
@@ -148,7 +148,7 @@ transfer_to_handler:
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/* Check to see if the dbcr0 register is set up to debug. Use the
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internal debug mode bit to do this. */
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lwz r12,THREAD_DBCR0(r12)
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andis. r12,r12,DBCR0_IDM@h
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andis. r12,r12,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h
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beq+ 3f
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/* From user and task is ptraced - load up global dbcr0 */
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li r12,-1 /* clear all pending debug events */
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@@ -292,7 +292,7 @@ syscall_exit_cont:
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/* If the process has its own DBCR0 value, load it up. The internal
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debug mode bit tells us that dbcr0 should be loaded. */
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lwz r0,THREAD+THREAD_DBCR0(r2)
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andis. r10,r0,DBCR0_IDM@h
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andis. r10,r0,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h
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bnel- load_dbcr0
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#endif
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#ifdef CONFIG_44x
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@@ -720,7 +720,7 @@ restore_user:
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/* Check whether this process has its own DBCR0 value. The internal
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debug mode bit tells us that dbcr0 should be loaded. */
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lwz r0,THREAD+THREAD_DBCR0(r2)
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andis. r10,r0,DBCR0_IDM@h
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andis. r10,r0,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h
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bnel- load_dbcr0
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#endif
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