Merge branch 'for-2.6.31' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
* 'for-2.6.31' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6: (29 commits) ide: re-implement ide_pci_init_one() on top of ide_pci_init_two() ide: unexport ide_find_dma_mode() ide: fix PowerMac bootup oops ide: skip probe if there are no devices on the port (v2) sl82c105: add printk() logging facility ide-tape: fix proc warning ide: add IDE_DFLAG_NIEN_QUIRK device flag ide: respect quirk_drives[] list on all controllers hpt366: enable all quirks for devices on quirk_drives[] list hpt366: sync quirk_drives[] list with pdc202xx_{new,old}.c ide: remove superfluous SELECT_MASK() call from do_rw_taskfile() ide: remove superfluous SELECT_MASK() call from ide_driveid_update() icside: remove superfluous ->maskproc method ide-tape: fix IDE_AFLAG_* atomic accesses ide-tape: change IDE_AFLAG_IGNORE_DSC non-atomically pdc202xx_old: kill resetproc() method pdc202xx_old: don't call pdc202xx_reset() on IRQ timeout pdc202xx_old: use ide_dma_test_irq() ide: preserve Host Protected Area by default (v2) ide-gd: implement block device ->set_capacity method (v2) ...
Цей коміт міститься в:
@@ -23,18 +23,6 @@
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#define PDC202XX_DEBUG_DRIVE_INFO 0
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static const char *pdc_quirk_drives[] = {
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"QUANTUM FIREBALLlct08 08",
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"QUANTUM FIREBALLP KA6.4",
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"QUANTUM FIREBALLP KA9.1",
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"QUANTUM FIREBALLP LM20.4",
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"QUANTUM FIREBALLP KX13.6",
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"QUANTUM FIREBALLP KX20.5",
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"QUANTUM FIREBALLP KX27.3",
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"QUANTUM FIREBALLP LM20.5",
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NULL
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};
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static void pdc_old_disable_66MHz_clock(ide_hwif_t *);
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static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
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@@ -151,19 +139,6 @@ static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif)
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outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg);
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}
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static void pdc202xx_quirkproc(ide_drive_t *drive)
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{
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const char **list, *m = (char *)&drive->id[ATA_ID_PROD];
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for (list = pdc_quirk_drives; *list != NULL; list++)
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if (strstr(m, *list) != NULL) {
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drive->quirk_list = 2;
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return;
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}
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drive->quirk_list = 0;
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}
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static void pdc202xx_dma_start(ide_drive_t *drive)
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{
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if (drive->current_speed > XFER_UDMA_2)
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@@ -203,52 +178,6 @@ static int pdc202xx_dma_end(ide_drive_t *drive)
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return ide_dma_end(drive);
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}
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static int pdc202xx_dma_test_irq(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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unsigned long high_16 = hwif->extra_base - 16;
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u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
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u8 sc1d = inb(high_16 + 0x001d);
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if (hwif->channel) {
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/* bit7: Error, bit6: Interrupting, bit5: FIFO Full, bit4: FIFO Empty */
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if ((sc1d & 0x50) == 0x50)
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goto somebody_else;
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else if ((sc1d & 0x40) == 0x40)
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return (dma_stat & 4) == 4;
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} else {
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/* bit3: Error, bit2: Interrupting, bit1: FIFO Full, bit0: FIFO Empty */
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if ((sc1d & 0x05) == 0x05)
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goto somebody_else;
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else if ((sc1d & 0x04) == 0x04)
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return (dma_stat & 4) == 4;
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}
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somebody_else:
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return (dma_stat & 4) == 4; /* return 1 if INTR asserted */
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}
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static void pdc202xx_reset(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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unsigned long high_16 = hwif->extra_base - 16;
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u8 udma_speed_flag = inb(high_16 | 0x001f);
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printk(KERN_WARNING "PDC202xx: software reset...\n");
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outb(udma_speed_flag | 0x10, high_16 | 0x001f);
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mdelay(100);
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outb(udma_speed_flag & ~0x10, high_16 | 0x001f);
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mdelay(2000); /* 2 seconds ?! */
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ide_set_max_pio(drive);
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}
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static void pdc202xx_dma_lost_irq(ide_drive_t *drive)
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{
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pdc202xx_reset(drive);
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ide_dma_lost_irq(drive);
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}
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static int init_chipset_pdc202xx(struct pci_dev *dev)
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{
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unsigned long dmabase = pci_resource_start(dev, 4);
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@@ -302,37 +231,22 @@ static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev,
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static const struct ide_port_ops pdc20246_port_ops = {
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.set_pio_mode = pdc202xx_set_pio_mode,
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.set_dma_mode = pdc202xx_set_mode,
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.quirkproc = pdc202xx_quirkproc,
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};
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static const struct ide_port_ops pdc2026x_port_ops = {
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.set_pio_mode = pdc202xx_set_pio_mode,
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.set_dma_mode = pdc202xx_set_mode,
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.quirkproc = pdc202xx_quirkproc,
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.resetproc = pdc202xx_reset,
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.cable_detect = pdc2026x_cable_detect,
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};
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static const struct ide_dma_ops pdc20246_dma_ops = {
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.dma_host_set = ide_dma_host_set,
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.dma_setup = ide_dma_setup,
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.dma_start = ide_dma_start,
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.dma_end = ide_dma_end,
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.dma_test_irq = pdc202xx_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timer_expiry = ide_dma_sff_timer_expiry,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_dma_ops pdc2026x_dma_ops = {
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.dma_host_set = ide_dma_host_set,
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.dma_setup = ide_dma_setup,
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.dma_start = pdc202xx_dma_start,
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.dma_end = pdc202xx_dma_end,
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.dma_test_irq = pdc202xx_dma_test_irq,
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.dma_lost_irq = pdc202xx_dma_lost_irq,
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.dma_test_irq = ide_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timer_expiry = ide_dma_sff_timer_expiry,
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.dma_clear = pdc202xx_reset,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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@@ -354,7 +268,7 @@ static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = {
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.name = DRV_NAME,
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.init_chipset = init_chipset_pdc202xx,
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.port_ops = &pdc20246_port_ops,
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.dma_ops = &pdc20246_dma_ops,
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.dma_ops = &sff_dma_ops,
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.host_flags = IDE_HFLAGS_PDC202XX,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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