Merge branch 'mlx5_mr_cache' into rdma.git for-next
Leon Romanovsky says: ==================== This series fixes various corner cases in the mlx5_ib MR cache implementation, see specific commit messages for more information. ==================== Based on the mlx5-next branch at git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux Due to dependencies * branch 'mlx5_mr-cache': RDMA/mlx5: Allow MRs to be created in the cache synchronously RDMA/mlx5: Revise how the hysteresis scheme works for cache filling RDMA/mlx5: Fix locking in MR cache work queue RDMA/mlx5: Lock access to ent->available_mrs/limit when doing queue_work RDMA/mlx5: Fix MR cache size and limit debugfs RDMA/mlx5: Always remove MRs from the cache before destroying them RDMA/mlx5: Simplify how the MR cache bucket is located RDMA/mlx5: Rename the tracking variables for the MR cache RDMA/mlx5: Replace spinlock protected write with atomic var {IB,net}/mlx5: Move asynchronous mkey creation to mlx5_ib {IB,net}/mlx5: Assign mkey variant in mlx5_ib only {IB,net}/mlx5: Setup mkey variant before mr create command invocation
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@@ -575,10 +575,6 @@ struct mlx5_priv {
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/* end: alloc staff */
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struct dentry *dbg_root;
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/* protect mkey key part */
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spinlock_t mkey_lock;
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u8 mkey_key;
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struct list_head dev_list;
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struct list_head ctx_list;
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spinlock_t ctx_lock;
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@@ -947,12 +943,6 @@ struct mlx5_cmd_mailbox *mlx5_alloc_cmd_mailbox_chain(struct mlx5_core_dev *dev,
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gfp_t flags, int npages);
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void mlx5_free_cmd_mailbox_chain(struct mlx5_core_dev *dev,
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struct mlx5_cmd_mailbox *head);
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int mlx5_core_create_mkey_cb(struct mlx5_core_dev *dev,
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struct mlx5_core_mkey *mkey,
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struct mlx5_async_ctx *async_ctx, u32 *in,
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int inlen, u32 *out, int outlen,
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mlx5_async_cbk_t callback,
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struct mlx5_async_work *context);
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int mlx5_core_create_mkey(struct mlx5_core_dev *dev,
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struct mlx5_core_mkey *mkey,
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u32 *in, int inlen);
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@@ -414,7 +414,8 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
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u8 reserved_at_16[0x1];
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u8 table_miss_action_domain[0x1];
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u8 termination_table[0x1];
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u8 reserved_at_19[0x7];
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u8 reformat_and_fwd_to_table[0x1];
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u8 reserved_at_1a[0x6];
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u8 reserved_at_20[0x2];
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u8 log_max_ft_size[0x6];
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u8 log_max_modify_header_context[0x8];
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@@ -741,7 +742,7 @@ struct mlx5_ifc_flow_table_eswitch_cap_bits {
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u8 flow_source[0x1];
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u8 reserved_at_18[0x2];
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u8 multi_fdb_encap[0x1];
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u8 reserved_at_1b[0x1];
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u8 egress_acl_forward_to_vport[0x1];
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u8 fdb_multi_path_to_table[0x1];
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u8 reserved_at_1d[0x3];
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@@ -8430,7 +8431,8 @@ struct mlx5_ifc_ptys_reg_bits {
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u8 proto_mask[0x3];
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u8 an_status[0x4];
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u8 reserved_at_24[0x1c];
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u8 reserved_at_24[0xc];
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u8 data_rate_oper[0x10];
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u8 ext_eth_proto_capability[0x20];
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@@ -10496,7 +10498,8 @@ enum {
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};
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enum {
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MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_TYPE_DEK = 0x1,
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MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_TYPE_TLS = 0x1,
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MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_TYPE_IPSEC = 0x2,
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};
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struct mlx5_ifc_tls_static_params_bits {
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