Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 updates from Heiko Carstens: "Since Martin is on vacation you get the s390 pull request for the v4.15 merge window this time from me. Besides a lot of cleanups and bug fixes these are the most important changes: - a new regset for runtime instrumentation registers - hardware accelerated AES-GCM support for the aes_s390 module - support for the new CEX6S crypto cards - support for FORTIFY_SOURCE - addition of missing z13 and new z14 instructions to the in-kernel disassembler - generate opcode tables for the in-kernel disassembler out of a simple text file instead of having to manually maintain those tables - fast memset16, memset32 and memset64 implementations - removal of named saved segment support - hardware counter support for z14 - queued spinlocks and queued rwlocks implementations for s390 - use the stack_depth tracking feature for s390 BPF JIT - a new s390_sthyi system call which emulates the sthyi (store hypervisor information) instruction - removal of the old KVM virtio transport - an s390 specific CPU alternatives implementation which is used in the new spinlock code" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: (88 commits) MAINTAINERS: add virtio-ccw.h to virtio/s390 section s390/noexec: execute kexec datamover without DAT s390: fix transactional execution control register handling s390/bpf: take advantage of stack_depth tracking s390: simplify transactional execution elf hwcap handling s390/zcrypt: Rework struct ap_qact_ap_info. s390/virtio: remove unused header file kvm_virtio.h s390: avoid undefined behaviour s390/disassembler: generate opcode tables from text file s390/disassembler: remove insn_to_mnemonic() s390/dasd: avoid calling do_gettimeofday() s390: vfio-ccw: Do not attempt to free no-op, test and tic cda. s390: remove named saved segment support s390/archrandom: Reconsider s390 arch random implementation s390/pci: do not require AIS facility s390/qdio: sanitize put_indicator s390/qdio: use atomic_cmpxchg s390/nmi: avoid using long-displacement facility s390: pass endianness info to sparse s390/decompressor: remove informational messages ...
This commit is contained in:
@@ -79,21 +79,25 @@ ENTRY(memset)
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ex %r4,0(%r3)
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br %r14
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.Lmemset_fill:
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stc %r3,0(%r2)
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cghi %r4,1
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lgr %r1,%r2
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ber %r14
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je .Lmemset_fill_exit
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aghi %r4,-2
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srlg %r3,%r4,8
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ltgr %r3,%r3
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srlg %r5,%r4,8
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ltgr %r5,%r5
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jz .Lmemset_fill_remainder
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.Lmemset_fill_loop:
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mvc 1(256,%r1),0(%r1)
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stc %r3,0(%r1)
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mvc 1(255,%r1),0(%r1)
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la %r1,256(%r1)
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brctg %r3,.Lmemset_fill_loop
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brctg %r5,.Lmemset_fill_loop
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.Lmemset_fill_remainder:
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larl %r3,.Lmemset_mvc
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ex %r4,0(%r3)
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stc %r3,0(%r1)
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larl %r5,.Lmemset_mvc
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ex %r4,0(%r5)
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br %r14
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.Lmemset_fill_exit:
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stc %r3,0(%r1)
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br %r14
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.Lmemset_xc:
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xc 0(1,%r1),0(%r1)
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@@ -127,3 +131,47 @@ ENTRY(memcpy)
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.Lmemcpy_mvc:
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mvc 0(1,%r1),0(%r3)
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EXPORT_SYMBOL(memcpy)
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/*
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* __memset16/32/64
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*
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* void *__memset16(uint16_t *s, uint16_t v, size_t count)
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* void *__memset32(uint32_t *s, uint32_t v, size_t count)
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* void *__memset64(uint64_t *s, uint64_t v, size_t count)
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*/
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.macro __MEMSET bits,bytes,insn
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ENTRY(__memset\bits)
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ltgr %r4,%r4
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bzr %r14
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cghi %r4,\bytes
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je .L__memset_exit\bits
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aghi %r4,-(\bytes+1)
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srlg %r5,%r4,8
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ltgr %r5,%r5
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lgr %r1,%r2
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jz .L__memset_remainder\bits
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.L__memset_loop\bits:
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\insn %r3,0(%r1)
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mvc \bytes(256-\bytes,%r1),0(%r1)
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la %r1,256(%r1)
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brctg %r5,.L__memset_loop\bits
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.L__memset_remainder\bits:
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\insn %r3,0(%r1)
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larl %r5,.L__memset_mvc\bits
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ex %r4,0(%r5)
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br %r14
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.L__memset_exit\bits:
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\insn %r3,0(%r2)
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br %r14
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.L__memset_mvc\bits:
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mvc \bytes(1,%r1),0(%r1)
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.endm
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__MEMSET 16,2,sth
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EXPORT_SYMBOL(__memset16)
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__MEMSET 32,4,st
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EXPORT_SYMBOL(__memset32)
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__MEMSET 64,8,stg
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EXPORT_SYMBOL(__memset64)
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|
@@ -9,8 +9,11 @@
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#include <linux/types.h>
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#include <linux/export.h>
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#include <linux/spinlock.h>
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#include <linux/jiffies.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/percpu.h>
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#include <asm/alternative.h>
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#include <asm/io.h>
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int spin_retry = -1;
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@@ -33,14 +36,46 @@ static int __init spin_retry_setup(char *str)
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}
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__setup("spin_retry=", spin_retry_setup);
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struct spin_wait {
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struct spin_wait *next, *prev;
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int node_id;
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} __aligned(32);
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static DEFINE_PER_CPU_ALIGNED(struct spin_wait, spin_wait[4]);
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#define _Q_LOCK_CPU_OFFSET 0
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#define _Q_LOCK_STEAL_OFFSET 16
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#define _Q_TAIL_IDX_OFFSET 18
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#define _Q_TAIL_CPU_OFFSET 20
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||||
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||||
#define _Q_LOCK_CPU_MASK 0x0000ffff
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#define _Q_LOCK_STEAL_ADD 0x00010000
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#define _Q_LOCK_STEAL_MASK 0x00030000
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#define _Q_TAIL_IDX_MASK 0x000c0000
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#define _Q_TAIL_CPU_MASK 0xfff00000
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#define _Q_LOCK_MASK (_Q_LOCK_CPU_MASK | _Q_LOCK_STEAL_MASK)
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#define _Q_TAIL_MASK (_Q_TAIL_IDX_MASK | _Q_TAIL_CPU_MASK)
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void arch_spin_lock_setup(int cpu)
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||||
{
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||||
struct spin_wait *node;
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int ix;
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||||
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node = per_cpu_ptr(&spin_wait[0], cpu);
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for (ix = 0; ix < 4; ix++, node++) {
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||||
memset(node, 0, sizeof(*node));
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node->node_id = ((cpu + 1) << _Q_TAIL_CPU_OFFSET) +
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(ix << _Q_TAIL_IDX_OFFSET);
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||||
}
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||||
}
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||||
|
||||
static inline int arch_load_niai4(int *lock)
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||||
{
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||||
int owner;
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||||
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||||
asm volatile(
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||||
#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
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" .long 0xb2fa0040\n" /* NIAI 4 */
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#endif
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ALTERNATIVE("", ".long 0xb2fa0040", 49) /* NIAI 4 */
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" l %0,%1\n"
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: "=d" (owner) : "Q" (*lock) : "memory");
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return owner;
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@@ -51,9 +86,7 @@ static inline int arch_cmpxchg_niai8(int *lock, int old, int new)
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int expected = old;
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asm volatile(
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#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
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" .long 0xb2fa0080\n" /* NIAI 8 */
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#endif
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ALTERNATIVE("", ".long 0xb2fa0080", 49) /* NIAI 8 */
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" cs %0,%3,%1\n"
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: "=d" (old), "=Q" (*lock)
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: "0" (old), "d" (new), "Q" (*lock)
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@@ -61,76 +94,161 @@ static inline int arch_cmpxchg_niai8(int *lock, int old, int new)
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return expected == old;
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}
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static inline struct spin_wait *arch_spin_decode_tail(int lock)
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{
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int ix, cpu;
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ix = (lock & _Q_TAIL_IDX_MASK) >> _Q_TAIL_IDX_OFFSET;
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cpu = (lock & _Q_TAIL_CPU_MASK) >> _Q_TAIL_CPU_OFFSET;
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return per_cpu_ptr(&spin_wait[ix], cpu - 1);
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}
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static inline int arch_spin_yield_target(int lock, struct spin_wait *node)
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{
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if (lock & _Q_LOCK_CPU_MASK)
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return lock & _Q_LOCK_CPU_MASK;
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if (node == NULL || node->prev == NULL)
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return 0; /* 0 -> no target cpu */
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while (node->prev)
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node = node->prev;
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return node->node_id >> _Q_TAIL_CPU_OFFSET;
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}
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||||
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static inline void arch_spin_lock_queued(arch_spinlock_t *lp)
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{
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struct spin_wait *node, *next;
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int lockval, ix, node_id, tail_id, old, new, owner, count;
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ix = S390_lowcore.spinlock_index++;
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barrier();
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lockval = SPINLOCK_LOCKVAL; /* cpu + 1 */
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node = this_cpu_ptr(&spin_wait[ix]);
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node->prev = node->next = NULL;
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node_id = node->node_id;
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||||
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||||
/* Enqueue the node for this CPU in the spinlock wait queue */
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while (1) {
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old = READ_ONCE(lp->lock);
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if ((old & _Q_LOCK_CPU_MASK) == 0 &&
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(old & _Q_LOCK_STEAL_MASK) != _Q_LOCK_STEAL_MASK) {
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/*
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* The lock is free but there may be waiters.
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* With no waiters simply take the lock, if there
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* are waiters try to steal the lock. The lock may
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* be stolen three times before the next queued
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* waiter will get the lock.
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*/
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new = (old ? (old + _Q_LOCK_STEAL_ADD) : 0) | lockval;
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if (__atomic_cmpxchg_bool(&lp->lock, old, new))
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/* Got the lock */
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goto out;
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/* lock passing in progress */
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continue;
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}
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/* Make the node of this CPU the new tail. */
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new = node_id | (old & _Q_LOCK_MASK);
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if (__atomic_cmpxchg_bool(&lp->lock, old, new))
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break;
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}
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/* Set the 'next' pointer of the tail node in the queue */
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tail_id = old & _Q_TAIL_MASK;
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if (tail_id != 0) {
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node->prev = arch_spin_decode_tail(tail_id);
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WRITE_ONCE(node->prev->next, node);
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}
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/* Pass the virtual CPU to the lock holder if it is not running */
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owner = arch_spin_yield_target(old, node);
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if (owner && arch_vcpu_is_preempted(owner - 1))
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smp_yield_cpu(owner - 1);
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/* Spin on the CPU local node->prev pointer */
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if (tail_id != 0) {
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count = spin_retry;
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while (READ_ONCE(node->prev) != NULL) {
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if (count-- >= 0)
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continue;
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count = spin_retry;
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/* Query running state of lock holder again. */
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owner = arch_spin_yield_target(old, node);
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if (owner && arch_vcpu_is_preempted(owner - 1))
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smp_yield_cpu(owner - 1);
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}
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}
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||||
/* Spin on the lock value in the spinlock_t */
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count = spin_retry;
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while (1) {
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old = READ_ONCE(lp->lock);
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owner = old & _Q_LOCK_CPU_MASK;
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||||
if (!owner) {
|
||||
tail_id = old & _Q_TAIL_MASK;
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new = ((tail_id != node_id) ? tail_id : 0) | lockval;
|
||||
if (__atomic_cmpxchg_bool(&lp->lock, old, new))
|
||||
/* Got the lock */
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||||
break;
|
||||
continue;
|
||||
}
|
||||
if (count-- >= 0)
|
||||
continue;
|
||||
count = spin_retry;
|
||||
if (!MACHINE_IS_LPAR || arch_vcpu_is_preempted(owner - 1))
|
||||
smp_yield_cpu(owner - 1);
|
||||
}
|
||||
|
||||
/* Pass lock_spin job to next CPU in the queue */
|
||||
if (node_id && tail_id != node_id) {
|
||||
/* Wait until the next CPU has set up the 'next' pointer */
|
||||
while ((next = READ_ONCE(node->next)) == NULL)
|
||||
;
|
||||
next->prev = NULL;
|
||||
}
|
||||
|
||||
out:
|
||||
S390_lowcore.spinlock_index--;
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||||
}
|
||||
|
||||
static inline void arch_spin_lock_classic(arch_spinlock_t *lp)
|
||||
{
|
||||
int lockval, old, new, owner, count;
|
||||
|
||||
lockval = SPINLOCK_LOCKVAL; /* cpu + 1 */
|
||||
|
||||
/* Pass the virtual CPU to the lock holder if it is not running */
|
||||
owner = arch_spin_yield_target(ACCESS_ONCE(lp->lock), NULL);
|
||||
if (owner && arch_vcpu_is_preempted(owner - 1))
|
||||
smp_yield_cpu(owner - 1);
|
||||
|
||||
count = spin_retry;
|
||||
while (1) {
|
||||
old = arch_load_niai4(&lp->lock);
|
||||
owner = old & _Q_LOCK_CPU_MASK;
|
||||
/* Try to get the lock if it is free. */
|
||||
if (!owner) {
|
||||
new = (old & _Q_TAIL_MASK) | lockval;
|
||||
if (arch_cmpxchg_niai8(&lp->lock, old, new))
|
||||
/* Got the lock */
|
||||
return;
|
||||
continue;
|
||||
}
|
||||
if (count-- >= 0)
|
||||
continue;
|
||||
count = spin_retry;
|
||||
if (!MACHINE_IS_LPAR || arch_vcpu_is_preempted(owner - 1))
|
||||
smp_yield_cpu(owner - 1);
|
||||
}
|
||||
}
|
||||
|
||||
void arch_spin_lock_wait(arch_spinlock_t *lp)
|
||||
{
|
||||
int cpu = SPINLOCK_LOCKVAL;
|
||||
int owner, count;
|
||||
|
||||
/* Pass the virtual CPU to the lock holder if it is not running */
|
||||
owner = arch_load_niai4(&lp->lock);
|
||||
if (owner && arch_vcpu_is_preempted(~owner))
|
||||
smp_yield_cpu(~owner);
|
||||
|
||||
count = spin_retry;
|
||||
while (1) {
|
||||
owner = arch_load_niai4(&lp->lock);
|
||||
/* Try to get the lock if it is free. */
|
||||
if (!owner) {
|
||||
if (arch_cmpxchg_niai8(&lp->lock, 0, cpu))
|
||||
return;
|
||||
continue;
|
||||
}
|
||||
if (count-- >= 0)
|
||||
continue;
|
||||
count = spin_retry;
|
||||
/*
|
||||
* For multiple layers of hypervisors, e.g. z/VM + LPAR
|
||||
* yield the CPU unconditionally. For LPAR rely on the
|
||||
* sense running status.
|
||||
*/
|
||||
if (!MACHINE_IS_LPAR || arch_vcpu_is_preempted(~owner))
|
||||
smp_yield_cpu(~owner);
|
||||
}
|
||||
/* Use classic spinlocks + niai if the steal time is >= 10% */
|
||||
if (test_cpu_flag(CIF_DEDICATED_CPU))
|
||||
arch_spin_lock_queued(lp);
|
||||
else
|
||||
arch_spin_lock_classic(lp);
|
||||
}
|
||||
EXPORT_SYMBOL(arch_spin_lock_wait);
|
||||
|
||||
void arch_spin_lock_wait_flags(arch_spinlock_t *lp, unsigned long flags)
|
||||
{
|
||||
int cpu = SPINLOCK_LOCKVAL;
|
||||
int owner, count;
|
||||
|
||||
local_irq_restore(flags);
|
||||
|
||||
/* Pass the virtual CPU to the lock holder if it is not running */
|
||||
owner = arch_load_niai4(&lp->lock);
|
||||
if (owner && arch_vcpu_is_preempted(~owner))
|
||||
smp_yield_cpu(~owner);
|
||||
|
||||
count = spin_retry;
|
||||
while (1) {
|
||||
owner = arch_load_niai4(&lp->lock);
|
||||
/* Try to get the lock if it is free. */
|
||||
if (!owner) {
|
||||
local_irq_disable();
|
||||
if (arch_cmpxchg_niai8(&lp->lock, 0, cpu))
|
||||
return;
|
||||
local_irq_restore(flags);
|
||||
continue;
|
||||
}
|
||||
if (count-- >= 0)
|
||||
continue;
|
||||
count = spin_retry;
|
||||
/*
|
||||
* For multiple layers of hypervisors, e.g. z/VM + LPAR
|
||||
* yield the CPU unconditionally. For LPAR rely on the
|
||||
* sense running status.
|
||||
*/
|
||||
if (!MACHINE_IS_LPAR || arch_vcpu_is_preempted(~owner))
|
||||
smp_yield_cpu(~owner);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(arch_spin_lock_wait_flags);
|
||||
|
||||
int arch_spin_trylock_retry(arch_spinlock_t *lp)
|
||||
{
|
||||
int cpu = SPINLOCK_LOCKVAL;
|
||||
@@ -148,126 +266,59 @@ int arch_spin_trylock_retry(arch_spinlock_t *lp)
|
||||
}
|
||||
EXPORT_SYMBOL(arch_spin_trylock_retry);
|
||||
|
||||
void _raw_read_lock_wait(arch_rwlock_t *rw)
|
||||
void arch_read_lock_wait(arch_rwlock_t *rw)
|
||||
{
|
||||
int count = spin_retry;
|
||||
int owner, old;
|
||||
|
||||
#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
|
||||
__RAW_LOCK(&rw->lock, -1, __RAW_OP_ADD);
|
||||
#endif
|
||||
owner = 0;
|
||||
while (1) {
|
||||
if (count-- <= 0) {
|
||||
if (owner && arch_vcpu_is_preempted(~owner))
|
||||
smp_yield_cpu(~owner);
|
||||
count = spin_retry;
|
||||
}
|
||||
old = ACCESS_ONCE(rw->lock);
|
||||
owner = ACCESS_ONCE(rw->owner);
|
||||
if (old < 0)
|
||||
continue;
|
||||
if (__atomic_cmpxchg_bool(&rw->lock, old, old + 1))
|
||||
return;
|
||||
if (unlikely(in_interrupt())) {
|
||||
while (READ_ONCE(rw->cnts) & 0x10000)
|
||||
barrier();
|
||||
return;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(_raw_read_lock_wait);
|
||||
|
||||
int _raw_read_trylock_retry(arch_rwlock_t *rw)
|
||||
/* Remove this reader again to allow recursive read locking */
|
||||
__atomic_add_const(-1, &rw->cnts);
|
||||
/* Put the reader into the wait queue */
|
||||
arch_spin_lock(&rw->wait);
|
||||
/* Now add this reader to the count value again */
|
||||
__atomic_add_const(1, &rw->cnts);
|
||||
/* Loop until the writer is done */
|
||||
while (READ_ONCE(rw->cnts) & 0x10000)
|
||||
barrier();
|
||||
arch_spin_unlock(&rw->wait);
|
||||
}
|
||||
EXPORT_SYMBOL(arch_read_lock_wait);
|
||||
|
||||
void arch_write_lock_wait(arch_rwlock_t *rw)
|
||||
{
|
||||
int count = spin_retry;
|
||||
int old;
|
||||
|
||||
while (count-- > 0) {
|
||||
old = ACCESS_ONCE(rw->lock);
|
||||
if (old < 0)
|
||||
continue;
|
||||
if (__atomic_cmpxchg_bool(&rw->lock, old, old + 1))
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(_raw_read_trylock_retry);
|
||||
/* Add this CPU to the write waiters */
|
||||
__atomic_add(0x20000, &rw->cnts);
|
||||
|
||||
#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
|
||||
/* Put the writer into the wait queue */
|
||||
arch_spin_lock(&rw->wait);
|
||||
|
||||
void _raw_write_lock_wait(arch_rwlock_t *rw, int prev)
|
||||
{
|
||||
int count = spin_retry;
|
||||
int owner, old;
|
||||
|
||||
owner = 0;
|
||||
while (1) {
|
||||
if (count-- <= 0) {
|
||||
if (owner && arch_vcpu_is_preempted(~owner))
|
||||
smp_yield_cpu(~owner);
|
||||
count = spin_retry;
|
||||
}
|
||||
old = ACCESS_ONCE(rw->lock);
|
||||
owner = ACCESS_ONCE(rw->owner);
|
||||
smp_mb();
|
||||
if (old >= 0) {
|
||||
prev = __RAW_LOCK(&rw->lock, 0x80000000, __RAW_OP_OR);
|
||||
old = prev;
|
||||
}
|
||||
if ((old & 0x7fffffff) == 0 && prev >= 0)
|
||||
old = READ_ONCE(rw->cnts);
|
||||
if ((old & 0x1ffff) == 0 &&
|
||||
__atomic_cmpxchg_bool(&rw->cnts, old, old | 0x10000))
|
||||
/* Got the lock */
|
||||
break;
|
||||
barrier();
|
||||
}
|
||||
|
||||
arch_spin_unlock(&rw->wait);
|
||||
}
|
||||
EXPORT_SYMBOL(_raw_write_lock_wait);
|
||||
EXPORT_SYMBOL(arch_write_lock_wait);
|
||||
|
||||
#else /* CONFIG_HAVE_MARCH_Z196_FEATURES */
|
||||
|
||||
void _raw_write_lock_wait(arch_rwlock_t *rw)
|
||||
void arch_spin_relax(arch_spinlock_t *lp)
|
||||
{
|
||||
int count = spin_retry;
|
||||
int owner, old, prev;
|
||||
int cpu;
|
||||
|
||||
prev = 0x80000000;
|
||||
owner = 0;
|
||||
while (1) {
|
||||
if (count-- <= 0) {
|
||||
if (owner && arch_vcpu_is_preempted(~owner))
|
||||
smp_yield_cpu(~owner);
|
||||
count = spin_retry;
|
||||
}
|
||||
old = ACCESS_ONCE(rw->lock);
|
||||
owner = ACCESS_ONCE(rw->owner);
|
||||
if (old >= 0 &&
|
||||
__atomic_cmpxchg_bool(&rw->lock, old, old | 0x80000000))
|
||||
prev = old;
|
||||
else
|
||||
smp_mb();
|
||||
if ((old & 0x7fffffff) == 0 && prev >= 0)
|
||||
break;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(_raw_write_lock_wait);
|
||||
|
||||
#endif /* CONFIG_HAVE_MARCH_Z196_FEATURES */
|
||||
|
||||
int _raw_write_trylock_retry(arch_rwlock_t *rw)
|
||||
{
|
||||
int count = spin_retry;
|
||||
int old;
|
||||
|
||||
while (count-- > 0) {
|
||||
old = ACCESS_ONCE(rw->lock);
|
||||
if (old)
|
||||
continue;
|
||||
if (__atomic_cmpxchg_bool(&rw->lock, 0, 0x80000000))
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(_raw_write_trylock_retry);
|
||||
|
||||
void arch_lock_relax(int cpu)
|
||||
{
|
||||
cpu = READ_ONCE(lp->lock) & _Q_LOCK_CPU_MASK;
|
||||
if (!cpu)
|
||||
return;
|
||||
if (MACHINE_IS_LPAR && !arch_vcpu_is_preempted(~cpu))
|
||||
if (MACHINE_IS_LPAR && !arch_vcpu_is_preempted(cpu - 1))
|
||||
return;
|
||||
smp_yield_cpu(~cpu);
|
||||
smp_yield_cpu(cpu - 1);
|
||||
}
|
||||
EXPORT_SYMBOL(arch_lock_relax);
|
||||
EXPORT_SYMBOL(arch_spin_relax);
|
||||
|
@@ -56,7 +56,7 @@ EXPORT_SYMBOL(strlen);
|
||||
*
|
||||
* returns the minimum of the length of @s and @n
|
||||
*/
|
||||
size_t strnlen(const char * s, size_t n)
|
||||
size_t strnlen(const char *s, size_t n)
|
||||
{
|
||||
return __strnend(s, n) - s;
|
||||
}
|
||||
@@ -195,14 +195,14 @@ EXPORT_SYMBOL(strncat);
|
||||
|
||||
/**
|
||||
* strcmp - Compare two strings
|
||||
* @cs: One string
|
||||
* @ct: Another string
|
||||
* @s1: One string
|
||||
* @s2: Another string
|
||||
*
|
||||
* returns 0 if @cs and @ct are equal,
|
||||
* < 0 if @cs is less than @ct
|
||||
* > 0 if @cs is greater than @ct
|
||||
* returns 0 if @s1 and @s2 are equal,
|
||||
* < 0 if @s1 is less than @s2
|
||||
* > 0 if @s1 is greater than @s2
|
||||
*/
|
||||
int strcmp(const char *cs, const char *ct)
|
||||
int strcmp(const char *s1, const char *s2)
|
||||
{
|
||||
register int r0 asm("0") = 0;
|
||||
int ret = 0;
|
||||
@@ -214,7 +214,7 @@ int strcmp(const char *cs, const char *ct)
|
||||
" ic %1,0(%3)\n"
|
||||
" sr %0,%1\n"
|
||||
"1:"
|
||||
: "+d" (ret), "+d" (r0), "+a" (cs), "+a" (ct)
|
||||
: "+d" (ret), "+d" (r0), "+a" (s1), "+a" (s2)
|
||||
: : "cc", "memory");
|
||||
return ret;
|
||||
}
|
||||
@@ -225,7 +225,7 @@ EXPORT_SYMBOL(strcmp);
|
||||
* @s: The string to be searched
|
||||
* @c: The character to search for
|
||||
*/
|
||||
char * strrchr(const char * s, int c)
|
||||
char *strrchr(const char *s, int c)
|
||||
{
|
||||
size_t len = __strend(s) - s;
|
||||
|
||||
@@ -261,7 +261,7 @@ static inline int clcle(const char *s1, unsigned long l1,
|
||||
* @s1: The string to be searched
|
||||
* @s2: The string to search for
|
||||
*/
|
||||
char * strstr(const char * s1,const char * s2)
|
||||
char *strstr(const char *s1, const char *s2)
|
||||
{
|
||||
int l1, l2;
|
||||
|
||||
@@ -307,15 +307,15 @@ EXPORT_SYMBOL(memchr);
|
||||
|
||||
/**
|
||||
* memcmp - Compare two areas of memory
|
||||
* @cs: One area of memory
|
||||
* @ct: Another area of memory
|
||||
* @s1: One area of memory
|
||||
* @s2: Another area of memory
|
||||
* @count: The size of the area.
|
||||
*/
|
||||
int memcmp(const void *cs, const void *ct, size_t n)
|
||||
int memcmp(const void *s1, const void *s2, size_t n)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = clcle(cs, n, ct, n);
|
||||
ret = clcle(s1, n, s2, n);
|
||||
if (ret)
|
||||
ret = ret == 1 ? -1 : 1;
|
||||
return ret;
|
||||
|
Reference in New Issue
Block a user