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powerpc/mm: Batch tlb flush when invalidating pte entries

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This will improve the task exit case, by batching tlb invalidates.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Aneesh Kumar K.V
2016-11-28 11:47:04 +05:30
committed by Michael Ellerman
parent e58d1cf243
commit d522ae1e49
1 changed files with 10 additions and 3 deletions
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13
arch/powerpc/include/asm/book3s/64/radix.h
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@@ -140,13 +140,20 @@ static inline unsigned long radix__pte_update(struct mm_struct *mm,
unsigned long new_pte;
old_pte = __radix_pte_update(ptep, ~0, 0);
asm volatile("ptesync" : : : "memory");
/*
* new value of pte
*/
new_pte = (old_pte | set) & ~clr;
radix__flush_tlb_pte_p9_dd1(old_pte, mm, addr);
__radix_pte_update(ptep, 0, new_pte);
/*
* If we are trying to clear the pte, we can skip
* the below sequence and batch the tlb flush. The
* tlb flush batching is done by mmu gather code
*/
if (new_pte) {
asm volatile("ptesync" : : : "memory");
radix__flush_tlb_pte_p9_dd1(old_pte, mm, addr);
__radix_pte_update(ptep, 0, new_pte);
}
} else
old_pte = __radix_pte_update(ptep, clr, set);
asm volatile("ptesync" : : : "memory");