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Merge tag 'omap-for-v4.13/fixes-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

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Pull "Few fixes for omaps for issues found recently" from Tony Lindgren:

- Fix disable_irq related shared IRQ warnings for omap3 PRM

- Fix omap4 legacy code regression that accidentally removed code that
  we still need for PRM interrupts

- Fix dm8168-evm NAND pins and MMC write protect pin direction

- Fix dra71-evm mdio impedance values

* tag 'omap-for-v4.13/fixes-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: dra71-evm: mdio: Fix impedance values
  ARM: dts: dm816x: Correct the state of the write protect pin
  ARM: dts: dm816x: Correct NAND support nodes
  ARM: OMAP4: Fix legacy code clean-up regression
  ARM: OMAP2+: Fix omap3 prm shared irq
This commit is contained in:
Arnd Bergmann
2017-07-27 12:50:35 +02:00
parent 2f9227c798 ff570a01b1
commit d4e740053a
6 changed files with 92 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
arch/arm/boot/dts/dm8168-evm.dts
View File

@@ -68,6 +68,34 @@
DM816X_IOPAD(0x0d08, MUX_MODE0) /* USB1_DRVVBUS */
>;
};
nandflash_pins: nandflash_pins {
pinctrl-single,pins = <
DM816X_IOPAD(0x0b38, PULL_UP | MUX_MODE0) /* PINCTRL207 GPMC_CS0*/
DM816X_IOPAD(0x0b60, PULL_ENA | MUX_MODE0) /* PINCTRL217 GPMC_ADV_ALE */
DM816X_IOPAD(0x0b54, PULL_UP | PULL_ENA | MUX_MODE0) /* PINCTRL214 GPMC_OE_RE */
DM816X_IOPAD(0x0b58, PULL_ENA | MUX_MODE0) /* PINCTRL215 GPMC_BE0_CLE */
DM816X_IOPAD(0x0b50, PULL_UP | MUX_MODE0) /* PINCTRL213 GPMC_WE */
DM816X_IOPAD(0x0b6c, MUX_MODE0) /* PINCTRL220 GPMC_WAIT */
DM816X_IOPAD(0x0be4, PULL_ENA | MUX_MODE0) /* PINCTRL250 GPMC_CLK */
DM816X_IOPAD(0x0ba4, MUX_MODE0) /* PINCTRL234 GPMC_D0 */
DM816X_IOPAD(0x0ba8, MUX_MODE0) /* PINCTRL234 GPMC_D1 */
DM816X_IOPAD(0x0bac, MUX_MODE0) /* PINCTRL234 GPMC_D2 */
DM816X_IOPAD(0x0bb0, MUX_MODE0) /* PINCTRL234 GPMC_D3 */
DM816X_IOPAD(0x0bb4, MUX_MODE0) /* PINCTRL234 GPMC_D4 */
DM816X_IOPAD(0x0bb8, MUX_MODE0) /* PINCTRL234 GPMC_D5 */
DM816X_IOPAD(0x0bbc, MUX_MODE0) /* PINCTRL234 GPMC_D6 */
DM816X_IOPAD(0x0bc0, MUX_MODE0) /* PINCTRL234 GPMC_D7 */
DM816X_IOPAD(0x0bc4, MUX_MODE0) /* PINCTRL234 GPMC_D8 */
DM816X_IOPAD(0x0bc8, MUX_MODE0) /* PINCTRL234 GPMC_D9 */
DM816X_IOPAD(0x0bcc, MUX_MODE0) /* PINCTRL234 GPMC_D10 */
DM816X_IOPAD(0x0bd0, MUX_MODE0) /* PINCTRL234 GPMC_D11 */
DM816X_IOPAD(0x0bd4, MUX_MODE0) /* PINCTRL234 GPMC_D12 */
DM816X_IOPAD(0x0bd8, MUX_MODE0) /* PINCTRL234 GPMC_D13 */
DM816X_IOPAD(0x0bdc, MUX_MODE0) /* PINCTRL234 GPMC_D14 */
DM816X_IOPAD(0x0be0, MUX_MODE0) /* PINCTRL234 GPMC_D15 */
>;
};
};
&i2c1 {
@@ -90,6 +118,8 @@
&gpmc {
ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>;
nand@0,0 {
compatible = "ti,omap2-nand";
@@ -98,9 +128,11 @@
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
#address-cells = <1>;
#size-cells = <1>;
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <16>;
gpmc,device-width = <2>;
gpmc,sync-clk-ps = <0>;
@@ -164,7 +196,7 @@
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
cd-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
};
/* At least dm8168-evm rev c won't support multipoint, later may */

2
arch/arm/boot/dts/dm816x.dtsi
View File

@@ -145,7 +145,7 @@
};
elm: elm@48080000 {
compatible = "ti,816-elm";
compatible = "ti,am3352-elm";
ti,hwmods = "elm";
reg = <0x48080000 0x2000>;
interrupts = <4>;

4
arch/arm/boot/dts/dra71-evm.dts
View File

@@ -190,7 +190,7 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
ti,impedance-control = <0x1f>;
ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
@@ -198,7 +198,7 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
ti,impedance-control = <0x1f>;
ti,min-output-impedance;
};
};