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clocksource/drivers/exynos_mct: Refactor resources allocation

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[ Upstream commit 7cd925a8823d16de5614d3f0aabea9948747accd ]

Move interrupts allocation from exynos4_timer_resources() into separate
function together with the interrupt number parsing code from
mct_init_dt(), so the code for managing interrupts is kept together.
While touching exynos4_timer_resources() function, move of_iomap() to it.
No functional changes.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211101193531.15078-2-semen.protsenko@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Marek Szyprowski
2021-11-01 21:35:30 +02:00
committed by Greg Kroah-Hartman
parent 42d331a279
commit d4e13c4a6f
1 changed files with 30 additions and 20 deletions
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50
drivers/clocksource/exynos_mct.c
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@@ -494,11 +494,14 @@ static int exynos4_mct_dying_cpu(unsigned int cpu)
return 0; return 0;
} }
static int __init exynos4_timer_resources(struct device_node *np, void __iomem *base) static int __init exynos4_timer_resources(struct device_node *np)
{ {
int err, cpu;
struct clk *mct_clk, *tick_clk; struct clk *mct_clk, *tick_clk;
reg_base = of_iomap(np, 0);
if (!reg_base)
panic("%s: unable to ioremap mct address space\n", __func__);
tick_clk = of_clk_get_by_name(np, "fin_pll"); tick_clk = of_clk_get_by_name(np, "fin_pll");
if (IS_ERR(tick_clk)) if (IS_ERR(tick_clk))
panic("%s: unable to determine tick clock rate\n", __func__); panic("%s: unable to determine tick clock rate\n", __func__);
@@ -509,9 +512,27 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem *
panic("%s: unable to retrieve mct clock instance\n", __func__); panic("%s: unable to retrieve mct clock instance\n", __func__);
clk_prepare_enable(mct_clk); clk_prepare_enable(mct_clk);
reg_base = base; return 0;
if (!reg_base) }
panic("%s: unable to ioremap mct address space\n", __func__);
static int __init exynos4_timer_interrupts(struct device_node *np,
unsigned int int_type)
{
int nr_irqs, i, err, cpu;
mct_int_type = int_type;
/* This driver uses only one global timer interrupt */
mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ);
/*
* Find out the number of local irqs specified. The local
* timer irqs are specified after the four global timer
* irqs are specified.
*/
nr_irqs = of_irq_count(np);
for (i = MCT_L0_IRQ; i < nr_irqs; i++)
mct_irqs[i] = irq_of_parse_and_map(np, i);
if (mct_int_type == MCT_INT_PPI) { if (mct_int_type == MCT_INT_PPI) {
@@ -571,24 +592,13 @@ out_irq:
static int __init mct_init_dt(struct device_node *np, unsigned int int_type) static int __init mct_init_dt(struct device_node *np, unsigned int int_type)
{ {
u32 nr_irqs, i;
int ret; int ret;
mct_int_type = int_type; ret = exynos4_timer_resources(np);
if (ret)
return ret;
/* This driver uses only one global timer interrupt */ ret = exynos4_timer_interrupts(np, int_type);
mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ);
/*
* Find out the number of local irqs specified. The local
* timer irqs are specified after the four global timer
* irqs are specified.
*/
nr_irqs = of_irq_count(np);
for (i = MCT_L0_IRQ; i < nr_irqs; i++)
mct_irqs[i] = irq_of_parse_and_map(np, i);
ret = exynos4_timer_resources(np, of_iomap(np, 0));
if (ret) if (ret)
return ret; return ret;