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drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x

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Use a generic name for this kind of PLL

Correction in dts files are already done here:
commit 5eb26c6059 ("ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x")

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
Gabriel Fernandez
2015-09-16 09:42:59 +02:00
committed by Stephen Boyd
parent 9054a31d60
commit d34e210ed3
2 changed files with 10 additions and 10 deletions
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12
drivers/clk/st/clkgen-pll.c
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@@ -193,7 +193,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_a0 = {
.ops = &stm_pll3200c32_ops,
};
static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = {
static const struct clkgen_pll_data st_pll3200c32_cx_0 = {
/* 407 C0 PLL0 */
.pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8),
.locked_status = CLKGEN_FIELD(0x2a0, 0x1, 24),
@@ -205,7 +205,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = {
.ops = &stm_pll3200c32_ops,
};
static const struct clkgen_pll_data st_pll3200c32_407_c0_1 = {
static const struct clkgen_pll_data st_pll3200c32_cx_1 = {
/* 407 C0 PLL1 */
.pdn_status = CLKGEN_FIELD(0x2c8, 0x1, 8),
.locked_status = CLKGEN_FIELD(0x2c8, 0x1, 24),
@@ -624,12 +624,12 @@ static const struct of_device_id c32_pll_of_match[] = {
.data = &st_pll3200c32_407_a0,
},
{
.compatible = "st,stih407-plls-c32-c0_0",
.data = &st_pll3200c32_407_c0_0,
.compatible = "st,plls-c32-cx_0",
.data = &st_pll3200c32_cx_0,
},
{
.compatible = "st,stih407-plls-c32-c0_1",
.data = &st_pll3200c32_407_c0_1,
.compatible = "st,plls-c32-cx_1",
.data = &st_pll3200c32_cx_1,
},
{
.compatible = "st,stih407-plls-c32-a9",