Merge tag 'spi-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "A quiet release for SPI, mainly driver updates and not too many of them: - Support for dummy transfers (for delays on startup) in drivers using transfer_one(). - Lots of enhancements to the Designware driver to support new Intel SoCs. - Support for newer Renesas chips. - DMA support for the i.MX driver. - One new driver for Broadcom BCM53xx chips" * tag 'spi-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (64 commits) spi: spi-mxs: fix a tiny typo in a comment spi: dw-mid: follow new DMAengine workflow spi: dw-mid: convert to use DMAengine wrappers spi: dw-mid: change magic numbers to the constants spi: orion: support armada extended baud rates spi: fsl: Sort include headers alphabetically spi: bcm53xx: Add missing module information spi: bcm53xx: Fix module dependency spi/rockchip: fix bug that cause the failure to read data in DMA mode spi: fsl-dspi: Remove probe info message spi: pl022: Add support for chip select extension spi: Fix possible ZERO_SIZE_PTR pointer dereferencing error. spi: dw: fix style of code in few places spi: dw: introduce support of loopback mode spi: dw-mid: terminate ongoing transfers at exit spi: dw-mid: respect 8 bit mode spi: clps711x: Migrate to the new clk subsystem spi: pl022: Add missing error check for devm_kzalloc spi: spi-imx: add DMA support spi: davinci: add support for adding delay between word's transmissions ...
This commit is contained in:
@@ -7,6 +7,9 @@ Required properties:
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- interrupts : Should contain CSPI/eCSPI interrupt
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- fsl,spi-num-chipselects : Contains the number of the chipselect
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- cs-gpios : Specifies the gpio pins to be used for chipselects.
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- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
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Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: DMA request names should include "tx" and "rx" if present.
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Example:
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@@ -19,4 +22,6 @@ ecspi@70010000 {
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fsl,spi-num-chipselects = <2>;
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cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */
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<&gpio3 25 0>; /* GPIO3_25 */
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dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
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dma-names = "rx", "tx";
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};
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@@ -6,8 +6,17 @@ Required properties:
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"renesas,sh-mobile-msiof" for SH Mobile series.
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Examples with soctypes are:
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"renesas,msiof-r8a7790" (R-Car H2)
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"renesas,msiof-r8a7791" (R-Car M2)
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- reg : Offset and length of the register set for the device
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"renesas,msiof-r8a7791" (R-Car M2-W)
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"renesas,msiof-r8a7792" (R-Car V2H)
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"renesas,msiof-r8a7793" (R-Car M2-N)
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"renesas,msiof-r8a7794" (R-Car E2)
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- reg : A list of offsets and lengths of the register sets for
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the device.
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If only one register set is present, it is to be used
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by both the CPU and the DMA engine.
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If two register sets are present, the first is to be
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used by the CPU, and the second is to be used by the
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DMA engine.
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- interrupt-parent : The phandle for the interrupt controller that
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services interrupts for this device
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- interrupts : Interrupt specifier
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@@ -17,12 +26,16 @@ Required properties:
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Optional properties:
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- clocks : Must contain a reference to the functional clock.
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- num-cs : Total number of chip-selects (default is 1)
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- dmas : Must contain a list of two references to DMA
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specifiers, one for transmission, and one for
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reception.
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- dma-names : Must contain a list of two DMA names, "tx" and "rx".
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Optional properties, deprecated for soctype-specific bindings:
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- renesas,tx-fifo-size : Overrides the default tx fifo size given in words
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(default is 64)
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- renesas,rx-fifo-size : Overrides the default rx fifo size given in words
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(default is 64, or 256 on R-Car H2 and M2)
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(default is 64, or 256 on R-Car Gen2)
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Pinctrl properties might be needed, too. See
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Documentation/devicetree/bindings/pinctrl/renesas,*.
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@@ -31,9 +44,11 @@ Example:
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msiof0: spi@e6e20000 {
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compatible = "renesas,msiof-r8a7791";
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reg = <0 0xe6e20000 0 0x0064>;
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reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>;
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interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
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dmas = <&dmac0 0x51>, <&dmac0 0x52>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@@ -1,5 +1,10 @@
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Davinci SPI controller device bindings
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Links on DM:
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Keystone 2 - http://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
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dm644x - http://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
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OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
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Required properties:
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- #address-cells: number of cells required to define a chip select
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address on the SPI bus. Should be set to 1.
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@@ -24,6 +29,30 @@ Optional:
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cs-gpios = <0>, <0>, <0>, <&gpio1 30 0>, <&gpio1 31 0>;
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where first three are internal CS and last two are GPIO CS.
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Optional properties for slave devices:
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SPI slave nodes can contain the following properties.
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Not all SPI Peripherals from Texas Instruments support this.
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Please check SPI peripheral documentation for a device before using these.
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- ti,spi-wdelay : delay between transmission of words
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(SPIFMTn.WDELAY, SPIDAT1.WDEL) must be specified in number of SPI module
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clock periods.
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delay = WDELAY * SPI_module_clock_period + 2 * SPI_module_clock_period
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Below is timing diagram which shows functional meaning of
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"ti,spi-wdelay" parameter.
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+-+ +-+ +-+ +-+ +-+ +-+ +-+ +-+
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SPI_CLK | | | | | | | | | | | | | | | |
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+----------+ +-+ +-+ +-+ +-+ +---------------------------+ +-+ +-+ +-
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SPI_SOMI/SIMO+-----------------+ +-----------
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+----------+ word1 +---------------------------+word2
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+-----------------+ +-----------
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WDELAY
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<-------------------------->
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Example of a NOR flash slave device (n25q032) connected to DaVinci
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SPI controller device over the SPI bus.
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@@ -43,6 +72,7 @@ spi0:spi@20BF0000 {
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compatible = "st,m25p32";
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spi-max-frequency = <25000000>;
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reg = <0>;
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ti,spi-wdelay = <8>;
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partition@0 {
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label = "u-boot-spl";
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@@ -10,7 +10,12 @@ Required properties:
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- pinctrl-names: must contain a "default" entry.
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- spi-num-chipselects : the number of the chipselect signals.
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- bus-num : the slave chip chipselect signal number.
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- big-endian : if DSPI modudle is big endian, the bool will be set in node.
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Optional property:
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- big-endian: If present the dspi device's registers are implemented
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in big endian mode, otherwise in native mode(same with CPU), for more
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detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
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Example:
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dspi0@4002c000 {
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@@ -1,7 +1,7 @@
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Marvell Orion SPI device
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Required properties:
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- compatible : should be "marvell,orion-spi".
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- compatible : should be "marvell,orion-spi" or "marvell,armada-370-spi".
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- reg : offset and length of the register set for the device
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- cell-index : Which of multiple SPI controllers is this.
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Optional properties:
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@@ -11,7 +11,10 @@ Required properties:
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- "renesas,rspi-sh7757" (SH)
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- "renesas,rspi-r7s72100" (RZ/A1H)
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- "renesas,qspi-r8a7790" (R-Car H2)
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- "renesas,qspi-r8a7791" (R-Car M2)
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- "renesas,qspi-r8a7791" (R-Car M2-W)
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- "renesas,qspi-r8a7792" (R-Car V2H)
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- "renesas,qspi-r8a7793" (R-Car M2-N)
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- "renesas,qspi-r8a7794" (R-Car E2)
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- reg : Address start and address range size of the device
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- interrupts : A list of interrupt-specifiers, one for each entry in
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interrupt-names.
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@@ -30,6 +33,9 @@ Required properties:
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Optional properties:
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- clocks : Must contain a reference to the functional clock.
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- dmas : Must contain a list of two references to DMA specifiers,
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one for transmission, and one for reception.
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- dma-names : Must contain a list of two DMA names, "tx" and "rx".
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Pinctrl properties might be needed, too. See
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Documentation/devicetree/bindings/pinctrl/renesas,*.
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@@ -58,4 +64,6 @@ Examples:
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dmas = <&dmac0 0x17>, <&dmac0 0x18>;
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dma-names = "tx", "rx";
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};
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