xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

drm/exynos/hdmi: improve HDMI/ACR related code

Browse Source 
Simple formula can be used to calculate CTS and N coefficients.
Additionaly ACR registers have different offsets for different versions
of IP.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Andrzej Hajda
2015-09-25 14:48:27 +02:00
committed by Inki Dae
parent 185f22d222
commit d24bb3e59d
2 changed files with 32 additions and 68 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
drivers/gpu/drm/exynos/regs-hdmi.h
View File

@@ -72,7 +72,6 @@
#define HDMI_V13_V_SYNC_GEN_3_0 HDMI_CORE_BASE(0x0150)
#define HDMI_V13_V_SYNC_GEN_3_1 HDMI_CORE_BASE(0x0154)
#define HDMI_V13_V_SYNC_GEN_3_2 HDMI_CORE_BASE(0x0158)
#define HDMI_V13_ACR_CON HDMI_CORE_BASE(0x0180)
#define HDMI_V13_AVI_CON HDMI_CORE_BASE(0x0300)
#define HDMI_V13_AVI_BYTE(n) HDMI_CORE_BASE(0x0320 + 4 * (n))
#define HDMI_V13_DC_CONTROL HDMI_CORE_BASE(0x05C0)
@@ -277,16 +276,26 @@
#define HDMI_ASP_CHCFG2 HDMI_CORE_BASE(0x0318)
#define HDMI_ASP_CHCFG3 HDMI_CORE_BASE(0x031C)
#define HDMI_V13_ACR_CON HDMI_CORE_BASE(0x0180)
#define HDMI_V13_ACR_MCTS0 HDMI_CORE_BASE(0x0184)
#define HDMI_V13_ACR_MCTS1 HDMI_CORE_BASE(0x0188)
#define HDMI_V13_ACR_MCTS2 HDMI_CORE_BASE(0x018C)
#define HDMI_V13_ACR_CTS0 HDMI_CORE_BASE(0x0190)
#define HDMI_V13_ACR_CTS1 HDMI_CORE_BASE(0x0194)
#define HDMI_V13_ACR_CTS2 HDMI_CORE_BASE(0x0198)
#define HDMI_V13_ACR_N0 HDMI_CORE_BASE(0x01A0)
#define HDMI_V13_ACR_N1 HDMI_CORE_BASE(0x01A4)
#define HDMI_V13_ACR_N2 HDMI_CORE_BASE(0x01A8)
#define HDMI_V14_ACR_CON HDMI_CORE_BASE(0x0400)
#define HDMI_ACR_MCTS0 HDMI_CORE_BASE(0x0410)
#define HDMI_ACR_MCTS1 HDMI_CORE_BASE(0x0414)
#define HDMI_ACR_MCTS2 HDMI_CORE_BASE(0x0418)
#define HDMI_ACR_CTS0 HDMI_CORE_BASE(0x0420)
#define HDMI_ACR_CTS1 HDMI_CORE_BASE(0x0424)
#define HDMI_ACR_CTS2 HDMI_CORE_BASE(0x0428)
#define HDMI_ACR_N0 HDMI_CORE_BASE(0x0430)
#define HDMI_ACR_N1 HDMI_CORE_BASE(0x0434)
#define HDMI_ACR_N2 HDMI_CORE_BASE(0x0438)
#define HDMI_V14_ACR_MCTS0 HDMI_CORE_BASE(0x0410)
#define HDMI_V14_ACR_MCTS1 HDMI_CORE_BASE(0x0414)
#define HDMI_V14_ACR_MCTS2 HDMI_CORE_BASE(0x0418)
#define HDMI_V14_ACR_CTS0 HDMI_CORE_BASE(0x0420)
#define HDMI_V14_ACR_CTS1 HDMI_CORE_BASE(0x0424)
#define HDMI_V14_ACR_CTS2 HDMI_CORE_BASE(0x0428)
#define HDMI_V14_ACR_N0 HDMI_CORE_BASE(0x0430)
#define HDMI_V14_ACR_N1 HDMI_CORE_BASE(0x0434)
#define HDMI_V14_ACR_N2 HDMI_CORE_BASE(0x0438)
/* Packet related registers */
#define HDMI_ACP_CON HDMI_CORE_BASE(0x0500)