crypto: caam - add register map changes cf. Era 10
Era 10 changes the register map. The updates that affect the drivers: -new version registers are added -DBG_DBG[deco_state] field is moved to a new register - DBG_EXEC[19:16] @ 8_0E3Ch. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@@ -3,6 +3,7 @@
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* caam - Freescale FSL CAAM support for Public Key Cryptography
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*
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* Copyright 2016 Freescale Semiconductor, Inc.
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* Copyright 2018 NXP
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*
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* There is no Shared Descriptor for PKC so that the Job Descriptor must carry
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* all the desired key parameters, input and output pointers.
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@@ -1017,7 +1018,7 @@ static int __init caam_pkc_init(void)
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struct platform_device *pdev;
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struct device *ctrldev;
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struct caam_drv_private *priv;
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u32 cha_inst, pk_inst;
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u32 pk_inst;
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int err;
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dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
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@@ -1045,8 +1046,11 @@ static int __init caam_pkc_init(void)
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return -ENODEV;
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/* Determine public key hardware accelerator presence. */
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cha_inst = rd_reg32(&priv->ctrl->perfmon.cha_num_ls);
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pk_inst = (cha_inst & CHA_ID_LS_PK_MASK) >> CHA_ID_LS_PK_SHIFT;
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if (priv->era < 10)
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pk_inst = (rd_reg32(&priv->ctrl->perfmon.cha_num_ls) &
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CHA_ID_LS_PK_MASK) >> CHA_ID_LS_PK_SHIFT;
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else
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pk_inst = rd_reg32(&priv->ctrl->vreg.pkha) & CHA_VER_NUM_MASK;
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/* Do not register algorithms if PKHA is not present. */
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if (!pk_inst)
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