drm/i915: implement BSD ring buffer V2
The BSD (bit stream decoder) ring is used for accessing the BSD engine which decodes video bitstream for H.264 and VC1 on G45+. It is asynchronous with the render ring and has access to separate parts of the GPU from it, though the render cache is coherent between the two. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Xiang Hai hao <haihao.xiang@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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@@ -53,7 +53,7 @@
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I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
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/** Interrupts that we mask and unmask at runtime. */
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#define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT)
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#define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT | I915_BSD_USER_INTERRUPT)
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#define I915_PIPE_VBLANK_STATUS (PIPE_START_VBLANK_INTERRUPT_STATUS |\
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PIPE_VBLANK_INTERRUPT_STATUS)
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@@ -362,6 +362,9 @@ irqreturn_t ironlake_irq_handler(struct drm_device *dev)
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dev_priv->hangcheck_count = 0;
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mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
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}
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if (gt_iir & GT_BSD_USER_INTERRUPT)
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DRM_WAKEUP(&dev_priv->bsd_ring.irq_queue);
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if (de_iir & DE_GSE)
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ironlake_opregion_gse_intr(dev);
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@@ -944,6 +947,9 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
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mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
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}
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if (HAS_BSD(dev) && (iir & I915_BSD_USER_INTERRUPT))
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DRM_WAKEUP(&dev_priv->bsd_ring.irq_queue);
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if (iir & I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT)
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intel_prepare_page_flip(dev, 0);
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@@ -1297,7 +1303,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
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/* enable kind of interrupts always enabled */
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u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
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DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE;
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u32 render_mask = GT_PIPE_NOTIFY;
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u32 render_mask = GT_PIPE_NOTIFY | GT_BSD_USER_INTERRUPT;
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u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG |
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SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG;
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@@ -1376,6 +1382,9 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
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DRM_INIT_WAITQUEUE(&dev_priv->render_ring.irq_queue);
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if (HAS_BSD(dev))
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DRM_INIT_WAITQUEUE(&dev_priv->bsd_ring.irq_queue);
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dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
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if (HAS_PCH_SPLIT(dev))
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