ath9k: Fix ASPM workaround usage
The PCIE Workaround register (AR_WA/0x4004) is used to handle various hardware quirks. For AR9002 chips, AR_WA_D3_L1_DISABLE is used to prevent the HW from automatically entering L1 state when D3 is enforced. AR_WA_D3_L1_DISABLE has to be enabled for a few AR9280 based cards, mark them based on their PCI subdevice/subvendor IDs and enforce it in ar9002_hw_configpcipowersave(). Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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John W. Linville

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8aada63cc4
commit
d1ae25a017
@@ -631,6 +631,7 @@ void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
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#define ATH9K_PCI_CUS217 0x0004
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#define ATH9K_PCI_WOW 0x0008
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#define ATH9K_PCI_BT_ANT_DIV 0x0010
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#define ATH9K_PCI_D3_L1_WAR 0x0020
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/*
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* Default cache line size, in bytes.
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