OMAP4: PRCM: reorganize existing OMAP4 PRCM header files
Split the existing cm44xx.h file into cm1_44xx.h and cm2_44xx.h files so they match their underlying OMAP hardware modules. Add clockdomain offset information. Add header files for the MPU local PRCM, prcm_mpu44xx.h, and for the SCRM, scrm44xx.h. SCRM register offsets still need to be added; TI should do this. Move the "_MOD" macros out of the prcm-common.h header file, into the header file of the hardware module that they belong to. For example, OMAP4430_PRM_*_MOD macros have been moved into the prm44xx.h header. Adjust #includes of all files that used the old PRCM header file names to point to the new filenames. The autogeneration scripts have been updated accordingly. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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@@ -8,15 +8,12 @@
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* Copyright (C) 2007-2009 Nokia Corporation
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*
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* Written by Paul Walmsley
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* OMAP4 defines in this file are automatically generated from the OMAP hardware
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* databases.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* Module offsets from both CM_BASE & PRM_BASE */
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/*
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@@ -51,75 +48,6 @@
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#define OMAP3430_NEON_MOD 0xb00
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#define OMAP3430ES2_USBHOST_MOD 0xc00
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#define BITS(n_bit) \
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(((1 << n_bit) - 1) | (1 << n_bit))
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#define BITFIELD(l_bit, u_bit) \
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(BITS(u_bit) & ~((BITS(l_bit)) >> 1))
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/* OMAP44XX specific module offsets */
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/* CM1 instances */
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#define OMAP4430_CM1_OCP_SOCKET_MOD 0x0000
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#define OMAP4430_CM1_CKGEN_MOD 0x0100
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#define OMAP4430_CM1_MPU_MOD 0x0300
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#define OMAP4430_CM1_TESLA_MOD 0x0400
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#define OMAP4430_CM1_ABE_MOD 0x0500
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#define OMAP4430_CM1_RESTORE_MOD 0x0e00
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#define OMAP4430_CM1_INSTR_MOD 0x0f00
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/* CM2 instances */
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#define OMAP4430_CM2_OCP_SOCKET_MOD 0x0000
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#define OMAP4430_CM2_CKGEN_MOD 0x0100
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#define OMAP4430_CM2_ALWAYS_ON_MOD 0x0600
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#define OMAP4430_CM2_CORE_MOD 0x0700
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#define OMAP4430_CM2_IVAHD_MOD 0x0f00
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#define OMAP4430_CM2_CAM_MOD 0x1000
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#define OMAP4430_CM2_DSS_MOD 0x1100
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#define OMAP4430_CM2_GFX_MOD 0x1200
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#define OMAP4430_CM2_L3INIT_MOD 0x1300
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#define OMAP4430_CM2_L4PER_MOD 0x1400
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#define OMAP4430_CM2_CEFUSE_MOD 0x1600
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#define OMAP4430_CM2_RESTORE_MOD 0x1e00
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#define OMAP4430_CM2_INSTR_MOD 0x1f00
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/* PRM instances */
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#define OMAP4430_PRM_OCP_SOCKET_MOD 0x0000
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#define OMAP4430_PRM_CKGEN_MOD 0x0100
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#define OMAP4430_PRM_MPU_MOD 0x0300
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#define OMAP4430_PRM_TESLA_MOD 0x0400
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#define OMAP4430_PRM_ABE_MOD 0x0500
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#define OMAP4430_PRM_ALWAYS_ON_MOD 0x0600
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#define OMAP4430_PRM_CORE_MOD 0x0700
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#define OMAP4430_PRM_IVAHD_MOD 0x0f00
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#define OMAP4430_PRM_CAM_MOD 0x1000
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#define OMAP4430_PRM_DSS_MOD 0x1100
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#define OMAP4430_PRM_GFX_MOD 0x1200
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#define OMAP4430_PRM_L3INIT_MOD 0x1300
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#define OMAP4430_PRM_L4PER_MOD 0x1400
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#define OMAP4430_PRM_CEFUSE_MOD 0x1600
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#define OMAP4430_PRM_WKUP_MOD 0x1700
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#define OMAP4430_PRM_WKUP_CM_MOD 0x1800
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#define OMAP4430_PRM_EMU_MOD 0x1900
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#define OMAP4430_PRM_EMU_CM_MOD 0x1a00
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#define OMAP4430_PRM_DEVICE_MOD 0x1b00
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#define OMAP4430_PRM_INSTR_MOD 0x1f00
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/* SCRM instances */
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#define OMAP4430_SCRM_SCRM_MOD 0x0000
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/* PRCM_MPU instances */
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#define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_MOD 0x0000
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#define OMAP4430_PRCM_MPU_DEVICE_PRM_MOD 0x0200
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#define OMAP4430_PRCM_MPU_CPU0_MOD 0x0400
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#define OMAP4430_PRCM_MPU_CPU1_MOD 0x0800
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/* 24XX register bits shared between CM & PRM registers */
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/* CM_FCLKEN1_CORE, CM_ICLKEN1_CORE, PM_WKEN1_CORE shared bits */
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@@ -461,5 +389,12 @@
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#define OMAP3430_EN_CORE_SHIFT 0
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#define OMAP3430_EN_CORE_MASK (1 << 0)
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/*
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* MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
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* submodule to exit hardreset
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*/
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#define MAX_MODULE_HARDRESET_WAIT 10000
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#endif
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